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clk-div6.c
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clk-div6.h
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clk: renesas: div6: use RENESAS for #define
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2016-03-15 18:13:02 -07:00 |
clk-emev2.c
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clk-mstp.c
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clk: renesas: mstp: ensure register writes complete
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2017-02-16 10:36:05 -08:00 |
clk-r8a73a4.c
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clk: renesas: Rename header file renesas.h
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2016-03-15 18:12:14 -07:00 |
clk-r8a7740.c
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clk: renesas: Rename header file renesas.h
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2016-03-15 18:12:14 -07:00 |
clk-r8a7778.c
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clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()
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2016-11-02 20:44:14 +01:00 |
clk-r8a7779.c
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clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()
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2016-11-02 20:44:17 +01:00 |
clk-rcar-gen2.c
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clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2
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2017-05-15 09:46:31 +02:00 |
clk-rz.c
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clk: renesas: rz: Select EXTAL vs USB clock
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2016-09-05 14:16:25 +02:00 |
clk-sh73a0.c
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clk: renesas: Rename header file renesas.h
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2016-03-15 18:12:14 -07:00 |
Kconfig
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clk: renesas: cpg-mssr: Add R8A7745 support
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2016-11-10 15:29:30 +01:00 |
Makefile
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clk: renesas: cpg-mssr: Add R8A7745 support
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2016-11-10 15:29:30 +01:00 |
r8a7743-cpg-mssr.c
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clk: renesas: cpg-mssr: Add R8A7743 support
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2016-11-10 15:29:28 +01:00 |
r8a7745-cpg-mssr.c
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clk: renesas: r8a7745: Remove PLL configs for MD19=0
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2017-05-15 09:46:31 +02:00 |
r8a7795-cpg-mssr.c
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clk: renesas: r8a7795: Add HS-USB ch3 clock
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2017-05-15 09:46:31 +02:00 |
r8a7796-cpg-mssr.c
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clk: renesas: r8a7796: Add Sound DVC clocks
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2017-05-15 09:46:31 +02:00 |
rcar-gen2-cpg.c
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clk: renesas: cpg-mssr: Add common R-Car Gen2 support
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2016-11-10 15:29:25 +01:00 |
rcar-gen2-cpg.h
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clk: renesas: cpg-mssr: Add common R-Car Gen2 support
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2016-11-10 15:29:25 +01:00 |
rcar-gen3-cpg.c
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clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0
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2017-03-30 13:26:02 +02:00 |
rcar-gen3-cpg.h
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clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
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2017-03-21 11:12:23 +01:00 |
renesas-cpg-mssr.c
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clk: renesas: cpg-mssr: Add support for fixing up clock tables
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2017-03-30 13:25:24 +02:00 |
renesas-cpg-mssr.h
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clk: renesas: cpg-mssr: Add support for fixing up clock tables
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2017-03-30 13:25:24 +02:00 |