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9865f1d46a
Currently there are numerous places where "struct pt_regs" are used to populate "struct stackframe", however all of those location do not consider the situation where the kernel might be compiled in THUMB2 mode, in which case the framepointer member of pt_regs become ARM_r7 instead of ARM_fp (r11). Document this idiosyncracy in the definition of "struct stackframe" The easiest solution is to introduce a new function (in the spirit of https://groups.google.com/forum/#!topic/linux.kernel/dA2YuUcSpZ4) which would hide the complexity of initializing the stackframe struct from pt_regs. Also implement a macro frame_pointer(regs) that would return the correct register so that we can use it in cases where we just require the frame pointer and not a whole struct stackframe Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Robert Richter <rric@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
164 lines
4.1 KiB
C
164 lines
4.1 KiB
C
/*
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* arch/arm/include/asm/ptrace.h
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*
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* Copyright (C) 1996-2003 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_PTRACE_H
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#define __ASM_ARM_PTRACE_H
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#include <uapi/asm/ptrace.h>
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#ifndef __ASSEMBLY__
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struct pt_regs {
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unsigned long uregs[18];
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};
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#define user_mode(regs) \
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(((regs)->ARM_cpsr & 0xf) == 0)
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#ifdef CONFIG_ARM_THUMB
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#define thumb_mode(regs) \
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(((regs)->ARM_cpsr & PSR_T_BIT))
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#else
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#define thumb_mode(regs) (0)
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#endif
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#ifndef CONFIG_CPU_V7M
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#define isa_mode(regs) \
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((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
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(((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
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#else
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#define isa_mode(regs) 1 /* Thumb */
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#endif
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#define processor_mode(regs) \
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((regs)->ARM_cpsr & MODE_MASK)
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#define interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & PSR_I_BIT))
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#define fast_interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & PSR_F_BIT))
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/* Are the current registers suitable for user mode?
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* (used to maintain security in signal handlers)
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*/
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static inline int valid_user_regs(struct pt_regs *regs)
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{
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#ifndef CONFIG_CPU_V7M
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unsigned long mode = regs->ARM_cpsr & MODE_MASK;
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/*
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* Always clear the F (FIQ) and A (delayed abort) bits
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*/
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regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
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if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
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if (mode == USR_MODE)
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return 1;
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if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
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return 1;
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}
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/*
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* Force CPSR to something logical...
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*/
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regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
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if (!(elf_hwcap & HWCAP_26BIT))
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regs->ARM_cpsr |= USR_MODE;
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return 0;
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#else /* ifndef CONFIG_CPU_V7M */
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return 1;
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#endif
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}
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static inline long regs_return_value(struct pt_regs *regs)
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{
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return regs->ARM_r0;
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}
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#define instruction_pointer(regs) (regs)->ARM_pc
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#ifdef CONFIG_THUMB2_KERNEL
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#define frame_pointer(regs) (regs)->ARM_r7
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#else
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#define frame_pointer(regs) (regs)->ARM_fp
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#endif
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static inline void instruction_pointer_set(struct pt_regs *regs,
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unsigned long val)
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{
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instruction_pointer(regs) = val;
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}
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#ifdef CONFIG_SMP
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extern unsigned long profile_pc(struct pt_regs *regs);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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#define predicate(x) ((x) & 0xf0000000)
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#define PREDICATE_ALWAYS 0xe0000000
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/*
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* True if instr is a 32-bit thumb instruction. This works if instr
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* is the first or only half-word of a thumb instruction. It also works
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* when instr holds all 32-bits of a wide thumb instruction if stored
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* in the form (first_half<<16)|(second_half)
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*/
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#define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
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/*
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* kprobe-based event tracer support
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*/
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#include <linux/stddef.h>
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#include <linux/types.h>
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#define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
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extern int regs_query_register_offset(const char *name);
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extern const char *regs_query_register_name(unsigned int offset);
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extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
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extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
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unsigned int n);
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/**
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* regs_get_register() - get register value from its offset
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* @regs: pt_regs from which register value is gotten
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* @offset: offset number of the register.
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*
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* regs_get_register returns the value of a register whose offset from @regs.
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* The @offset is the offset of the register in struct pt_regs.
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* If @offset is bigger than MAX_REG_OFFSET, this returns 0.
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*/
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static inline unsigned long regs_get_register(struct pt_regs *regs,
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unsigned int offset)
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{
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if (unlikely(offset > MAX_REG_OFFSET))
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return 0;
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return *(unsigned long *)((unsigned long)regs + offset);
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}
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/* Valid only for Kernel mode traps. */
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static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
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{
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return regs->ARM_sp;
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}
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static inline unsigned long user_stack_pointer(struct pt_regs *regs)
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{
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return regs->ARM_sp;
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}
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#define current_pt_regs(void) ({ \
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register unsigned long sp asm ("sp"); \
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(struct pt_regs *)((sp | (THREAD_SIZE - 1)) - 7) - 1; \
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})
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#endif /* __ASSEMBLY__ */
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#endif
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