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https://github.com/edk2-porting/linux-next.git
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7a8689df21
The PRCMU devices are getting populated from the MFD driver and that is enough for them to come up. We already have an early quirk for the things that need to happen really early and the PRCMU timer that need to be registered really early will find its own node just fine as the timer/clocksource subsystem looks through the whole device tree for compatible nodes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
140 lines
3.7 KiB
C
140 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2008-2009 ST-Ericsson SA
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <linux/platform_data/arm-ux500-pm.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/regulator/machine.h>
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#include <asm/outercache.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/map.h>
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#include <asm/mach/arch.h>
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#include "db8500-regs.h"
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#include "pm_domains.h"
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static int __init ux500_l2x0_unlock(void)
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{
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int i;
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struct device_node *np;
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void __iomem *l2x0_base;
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np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
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l2x0_base = of_iomap(np, 0);
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of_node_put(np);
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if (!l2x0_base)
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return -ENODEV;
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/*
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* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
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* apparently locks both caches before jumping to the kernel. The
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* l2x0 core will not touch the unlock registers if the l2x0 is
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* already enabled, so we do it right here instead. The PL310 has
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* 8 sets of registers, one per possible CPU.
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*/
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for (i = 0; i < 8; i++) {
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
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i * L2X0_LOCKDOWN_STRIDE);
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}
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iounmap(l2x0_base);
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return 0;
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}
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static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
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{
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/*
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* We can't write to secure registers as we are in non-secure
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* mode, until we have some SMI service available.
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*/
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}
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/*
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* FIXME: Should we set up the GPIO domain here?
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*
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* The problem is that we cannot put the interrupt resources into the platform
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* device until the irqdomain has been added. Right now, we set the GIC interrupt
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* domain from init_irq(), then load the gpio driver from
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* core_initcall(nmk_gpio_init) and add the platform devices from
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* arch_initcall(customize_machine).
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*
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* This feels fragile because it depends on the gpio device getting probed
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* _before_ any device uses the gpio interrupts.
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*/
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static void __init ux500_init_irq(void)
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{
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struct device_node *np;
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struct resource r;
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irqchip_init();
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np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
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of_address_to_resource(np, 0, &r);
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of_node_put(np);
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if (!r.start) {
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pr_err("could not find PRCMU base resource\n");
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return;
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}
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prcmu_early_init(r.start, r.end-r.start);
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ux500_pm_init(r.start, r.end-r.start);
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/* Unlock before init */
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ux500_l2x0_unlock();
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outer_cache.write_sec = ux500_l2c310_write_sec;
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}
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static void ux500_restart(enum reboot_mode mode, const char *cmd)
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{
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local_irq_disable();
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local_fiq_disable();
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prcmu_system_reset(0);
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}
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static const struct of_device_id u8500_local_bus_nodes[] = {
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/* only create devices below soc node */
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{ .compatible = "stericsson,db8500", },
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{ .compatible = "simple-bus"},
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{ },
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};
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static void __init u8500_init_machine(void)
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{
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/* Initialize ux500 power domains */
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ux500_pm_domains_init();
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of_platform_populate(NULL, u8500_local_bus_nodes,
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NULL, NULL);
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}
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static const char * stericsson_dt_platform_compat[] = {
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"st-ericsson,u8500",
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"st-ericsson,u9500",
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NULL,
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};
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DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.init_irq = ux500_init_irq,
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.init_machine = u8500_init_machine,
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.dt_compat = stericsson_dt_platform_compat,
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.restart = ux500_restart,
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MACHINE_END
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