Tomasz Figa 5fadfc7ed3 clk: samsung: exynos4: Register PLL rate tables for Exynos4210 ... This patch adds rate tables for PLLs that can be reconfigured at runtime for Exynos4210 SoCs. Provided tables contain PLL coefficients for input clock of 24 MHz and so are registered only in this case. MPLL does not need runtime reconfiguration and so table for it is not provided. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-09-06 13:33:57 -07:00
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mmp	clk: add CLK_SET_RATE_NO_REPARENT flag	2013-08-19 12:27:17 -07:00
mvebu	clk: kirkwood: Fix incorrect placement of __initconst	2013-08-27 18:35:19 -07:00
mxs	clk: add CLK_SET_RATE_NO_REPARENT flag	2013-08-19 12:27:17 -07:00
rockchip	clk: add support for Rockchip gate clocks	2013-06-20 15:58:27 -07:00
samsung	clk: samsung: exynos4: Register PLL rate tables for Exynos4210	2013-09-06 13:33:57 -07:00
socfpga	ARM: socfpga: Add support to gate peripheral clocks	2013-06-11 16:35:29 -07:00
spear	clk: add CLK_SET_RATE_NO_REPARENT flag	2013-08-19 12:27:17 -07:00
sunxi	clk: sunxi: Fix incorrect placement of __initconst	2013-08-27 18:35:43 -07:00
tegra	clk: tegra30: Don't wait for PLL_U lock bit	2013-08-28 19:08:09 -07:00
ux500	The common clock framework changes for 3.11 include new clock drivers	2013-07-03 11:54:50 -07:00
versatile	clk: add CLK_SET_RATE_NO_REPARENT flag	2013-08-19 12:27:17 -07:00
x86	ACPI / LPSS: add support for Intel BayTrail	2013-06-19 01:08:47 +02:00
zynq	arm: Xilinx Zynq clock changes for v3.12	2013-08-20 14:58:48 -07:00
clk-axi-clkgen.c	clk: Add axi-clkgen driver	2013-03-19 17:20:30 -07:00
clk-bcm2835.c	clk: bcm2835: Fix incorrect placement of __initconst	2013-08-27 18:32:24 -07:00
clk-composite.c	clk: composite: allow fixed rates & fixed dividers	2013-04-12 11:23:24 -07:00
clk-devres.c	ARM: 7537/1: clk: Fix release in devm_clk_put()	2012-09-19 21:51:27 +01:00
clk-divider.c	clk: wrap I/O access for improved portability	2013-08-27 17:50:38 -07:00
clk-fixed-factor.c	clk: export fixed-factor, gate & mux registration	2013-08-16 12:08:54 -07:00
clk-fixed-rate.c	clk: fixed-rate: Export clk_fixed_rate_register()	2013-08-16 12:08:50 -07:00
clk-gate.c	clk: wrap I/O access for improved portability	2013-08-27 17:50:38 -07:00
clk-highbank.c	ACPI and power management updates for 3.9-rc1	2013-02-20 11:26:56 -08:00
clk-ls1x.c	clk: add Loongson1B clock support	2012-08-31 11:05:18 -07:00
clk-max77686.c	clk: max77686: Avoid double free at remove time	2013-01-15 16:16:26 -08:00
clk-mux.c	clk: wrap I/O access for improved portability	2013-08-27 17:50:38 -07:00
clk-nomadik.c	clk: nomadik: Fix incorrect placement of __initconst	2013-08-27 18:34:00 -07:00
clk-nspire.c	clk: Add TI-Nspire clock drivers	2013-05-31 12:07:45 -07:00
clk-ppc-corenet.c	clk: mpc85xx: Update the compatible string	2013-05-30 11:55:35 -07:00
clk-prima2.c	clk: prima2: Fix incorrect placement of __initdata	2013-08-08 22:35:21 -07:00
clk-s2mps11.c	clk: s2mps11: Add support for s2mps11	2013-08-08 15:57:33 -07:00
clk-si5351.c	The common clock framework changes for 3.11 include new clock drivers	2013-07-03 11:54:50 -07:00
clk-si5351.h	clk: si5351: Allow user to define disabled state for every clock output	2013-05-28 22:50:31 -07:00
clk-twl6040.c	clk: use platform_{get,set}_drvdata()	2013-05-30 18:19:34 -07:00
clk-u300.c	clk: u300: Fix incorrect placement of __initconst	2013-08-27 18:34:09 -07:00
clk-vt8500.c	The common clock framework changes for 3.11 include new clock drivers	2013-07-03 11:54:50 -07:00
clk-wm831x.c	clk: wm831x: Initialise wm831x pointer on init	2013-08-30 11:57:53 -07:00
clk.c	clk: Move symbol export to proper location	2013-09-03 13:41:29 -07:00
clkdev.c	ARM: 7534/1: clk: Make the managed clk functions generically available	2012-09-15 21:55:27 +01:00
Kconfig	clk: s2mps11: Add support for s2mps11	2013-08-08 15:57:33 -07:00
Makefile	clk: s2mps11: Add support for s2mps11	2013-08-08 15:57:33 -07:00