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2427b30377
Document the R8A7795-specific DT bindings and support them in the driver. The HDMI and LVDS outputs are currently not supported. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
95 lines
3.2 KiB
Plaintext
95 lines
3.2 KiB
Plaintext
* Renesas R-Car Display Unit (DU)
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Required Properties:
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- compatible: must be one of the following.
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
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- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
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- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
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- "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
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- reg: A list of base address and length of each memory resource, one for
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each entry in the reg-names property.
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- reg-names: Name of the memory resources. The DU requires one memory
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resource for the DU core (named "du") and one memory resource for each
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LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
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index).
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- interrupt-parent: phandle of the parent interrupt controller.
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- interrupts: Interrupt specifiers for the DU interrupts.
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- clocks: A list of phandles + clock-specifier pairs, one for each entry in
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the clock-names property.
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- clock-names: Name of the clocks. This property is model-dependent.
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- R8A7779 uses a single functional clock. The clock doesn't need to be
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named.
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- R8A779[01345] use one functional clock per channel and one clock per LVDS
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encoder (if available). The functional clocks must be named "du.x" with
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"x" being the channel numerical index. The LVDS clocks must be named
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"lvds.x" with "x" being the LVDS encoder numerical index.
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- In addition to the functional and encoder clocks, all DU versions also
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support externally supplied pixel clocks. Those clocks are optional.
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When supplied they must be named "dclkin.x" with "x" being the input
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clock numerical index.
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Required nodes:
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The connections to the DU output video ports are modeled using the OF graph
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bindings specified in Documentation/devicetree/bindings/graph.txt.
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The following table lists for each supported model the port number
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corresponding to each DU output.
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Port 0 Port1 Port2 Port3
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-----------------------------------------------------------------------------
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R8A7779 (H1) DPAD 0 DPAD 1 - -
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R8A7790 (H2) DPAD LVDS 0 LVDS 1 -
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R8A7791 (M2-W) DPAD LVDS 0 - -
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R8A7793 (M2-N) DPAD LVDS 0 - -
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R8A7794 (E2) DPAD 0 DPAD 1 - -
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R8A7795 (H3) DPAD HDMI 0 HDMI 1 LVDS
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Example: R8A7790 (R-Car H2) DU
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du: du@feb00000 {
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compatible = "renesas,du-r8a7790";
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reg = <0 0xfeb00000 0 0x70000>,
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<0 0xfeb90000 0 0x1c>,
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<0 0xfeb94000 0 0x1c>;
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reg-names = "du", "lvds.0", "lvds.1";
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interrupt-parent = <&gic>;
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interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
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<0 268 IRQ_TYPE_LEVEL_HIGH>,
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<0 269 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp7_clks R8A7790_CLK_DU0>,
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<&mstp7_clks R8A7790_CLK_DU1>,
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<&mstp7_clks R8A7790_CLK_DU2>,
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<&mstp7_clks R8A7790_CLK_LVDS0>,
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<&mstp7_clks R8A7790_CLK_LVDS1>;
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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du_out_rgb: endpoint {
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};
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};
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port@1 {
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reg = <1>;
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du_out_lvds0: endpoint {
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};
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};
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port@2 {
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reg = <2>;
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du_out_lvds1: endpoint {
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};
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};
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};
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};
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