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https://github.com/edk2-porting/linux-next.git
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5ede3ceb7b
This adds support for new features, and contains stuff from most platforms. A number of these patches could have fit into other branches, too, but were small enough not to cause too much confusion here. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUATwtYgGCrR//JCVInAQKzRRAAybELlfOIT1fyVlzkzIgw0/OKxS75Vqda v5mNYUfQ001WxGjwbFGgFphrQgyhulmLj6gN5l1rwaBjEZlwLe5uk3sReeqeDMLk bERLbpg22ymka4JVhvugq5qh9UP2ptlvZV/cAZC0u2JBq+CaarFIJsrzbOyXAngf 4kUkaMhKi8DDZTqrwwACaLxR7qtf3ddiSxNLZ93X4fDh4a3qs/EJErVg/xCFlfM3 YTzTjKuqLV2cGT34E9YTJieN9o94G+PiqvbDsP3kOwG2dSElpRWsZwX/0hDoyCxN cWbqPfrrdzt/kDcNnNd8MZ16AJlPc4ElVVEWPF71tKP3HfKqtZ0vMlpzsldioFz6 8AKvaXJXRkRddY4KqNcXeEQHcDxO0uniG/3lhZY8NlzO/1PnPQ4hGl8fhw+e/2z0 nAQFUsCVIXacsxamPk/fFBUhYzyK7JrnH4pB3b7SPcCj7X9MVyWK+pbT5LA+VGOL Ys8tv3NtTWEObyW1s3NT+BEy9FkkRu4EG3TxPwHUXk4BTwa6nDmJBPjk7Hv7q4cn T58lPet8Aylhht2aZx+0dxK3MHtMOmgsJ5jQF0OAi48Kmx8kXPZ1AeXObROncbZL aI7qfuGTzps7MlUBYlmrMdceTfYLeOqIEoVyFX8N4xLE33alk8DMKc37QoTJVuxQ KrY8sCVMkK0= =N2B4 -----END PGP SIGNATURE----- Merge tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc New feature development This adds support for new features, and contains stuff from most platforms. A number of these patches could have fit into other branches, too, but were small enough not to cause too much confusion here. * tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits) mfd/db8500-prcmu: remove support for early silicon revisions ARM: ux500: fix the smp_twd clock calculation ARM: ux500: remove support for early silicon revisions ARM: ux500: update register files ARM: ux500: register DB5500 PMU dynamically ARM: ux500: update ASIC detection for U5500 ARM: ux500: support DB8520 ARM: picoxcell: implement watchdog restart ARM: OMAP3+: hwmod data: Add the default clockactivity for I2C ARM: OMAP3: hwmod data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1 ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP4 ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP3 ARM: OMAP: hwmod data: Add support for AM35xx UART4/ttyO3 ARM: Orion: Remove address map info from all platform data structures ARM: Orion: Get address map from plat-orion instead of via platform_data ARM: Orion: mbus_dram_info consolidation ARM: Orion: Consolidate the address map setup ARM: Kirkwood: Add configuration for MPP12 as GPIO ARM: Kirkwood: Recognize A1 revision of 6282 chip ARM: ux500: update the MOP500 GPIO assignments ...
181 lines
4.7 KiB
C
181 lines
4.7 KiB
C
/*
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* Copyright (C) 2008-2009 ST-Ericsson SA
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/mach/map.h>
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#include <asm/pmu.h>
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#include <plat/gpio-nomadik.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/devices.h>
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#include <mach/usb.h>
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#include "devices-db8500.h"
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#include "ste-dma40-db8500.h"
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/* minimum static i/o mapping required to boot U8500 platforms */
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static struct map_desc u8500_uart_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
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};
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static struct map_desc u8500_io_desc[] __initdata = {
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/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
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__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
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__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
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};
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void __init u8500_map_io(void)
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{
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/*
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* Map the UARTs early so that the DEBUG_LL stuff continues to work.
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*/
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iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
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ux500_map_io();
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iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
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_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
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}
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static struct resource db8500_pmu_resources[] = {
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[0] = {
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.start = IRQ_DB8500_PMU,
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.end = IRQ_DB8500_PMU,
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.flags = IORESOURCE_IRQ,
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},
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};
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/*
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* The PMU IRQ lines of two cores are wired together into a single interrupt.
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* Bounce the interrupt to the other core if it's not ours.
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*/
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static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
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{
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irqreturn_t ret = handler(irq, dev);
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int other = !smp_processor_id();
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if (ret == IRQ_NONE && cpu_online(other))
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irq_set_affinity(irq, cpumask_of(other));
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/*
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* We should be able to get away with the amount of IRQ_NONEs we give,
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* while still having the spurious IRQ detection code kick in if the
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* interrupt really starts hitting spuriously.
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*/
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return ret;
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}
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static struct arm_pmu_platdata db8500_pmu_platdata = {
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.handle_irq = db8500_pmu_handler,
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};
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static struct platform_device db8500_pmu_device = {
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.name = "arm-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.num_resources = ARRAY_SIZE(db8500_pmu_resources),
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.resource = db8500_pmu_resources,
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.dev.platform_data = &db8500_pmu_platdata,
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};
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static struct platform_device db8500_prcmu_device = {
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.name = "db8500-prcmu",
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};
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static struct platform_device *platform_devs[] __initdata = {
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&u8500_dma40_device,
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&db8500_pmu_device,
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&db8500_prcmu_device,
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};
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static resource_size_t __initdata db8500_gpio_base[] = {
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U8500_GPIOBANK0_BASE,
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U8500_GPIOBANK1_BASE,
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U8500_GPIOBANK2_BASE,
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U8500_GPIOBANK3_BASE,
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U8500_GPIOBANK4_BASE,
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U8500_GPIOBANK5_BASE,
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U8500_GPIOBANK6_BASE,
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U8500_GPIOBANK7_BASE,
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U8500_GPIOBANK8_BASE,
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};
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static void __init db8500_add_gpios(void)
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{
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struct nmk_gpio_platform_data pdata = {
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.supports_sleepmode = true,
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};
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dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base),
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IRQ_DB8500_GPIO0, &pdata);
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}
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static int usb_db8500_rx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_IEP_8
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};
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static int usb_db8500_tx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_OEP_8
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};
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/*
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* This function is called from the board init
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*/
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void __init u8500_init_devices(void)
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{
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db8500_add_rtc();
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db8500_add_gpios();
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db8500_add_usb(usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
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platform_device_register_simple("cpufreq-u8500", -1, NULL, 0);
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platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
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return ;
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}
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