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https://github.com/edk2-porting/linux-next.git
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1155 lines
25 KiB
C
1155 lines
25 KiB
C
/*
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* arch/mips/kernel/gdb-stub.c
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*
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* Originally written by Glenn Engel, Lake Stevens Instrument Division
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*
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* Contributed by HP Systems
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*
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* Modified for SPARC by Stu Grossman, Cygnus Support.
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*
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* Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
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* Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
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*
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* Copyright (C) 1995 Andreas Busse
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*
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* Copyright (C) 2003 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*/
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/*
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* To enable debugger support, two things need to happen. One, a
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* call to set_debug_traps() is necessary in order to allow any breakpoints
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* or error conditions to be properly intercepted and reported to gdb.
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* Two, a breakpoint needs to be generated to begin communication. This
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* is most easily accomplished by a call to breakpoint(). Breakpoint()
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* simulates a breakpoint by executing a BREAK instruction.
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*
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*
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* The following gdb commands are supported:
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*
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* command function Return value
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*
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* g return the value of the CPU registers hex data or ENN
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* G set the value of the CPU registers OK or ENN
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*
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* mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
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* MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
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*
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* c Resume at current address SNN ( signal NN)
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* cAA..AA Continue at address AA..AA SNN
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*
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* s Step one instruction SNN
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* sAA..AA Step one instruction from AA..AA SNN
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*
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* k kill
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*
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* ? What was the last sigval ? SNN (signal NN)
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*
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* bBB..BB Set baud rate to BB..BB OK or BNN, then sets
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* baud rate
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*
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* All commands and responses are sent with a packet which includes a
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* checksum. A packet consists of
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*
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* $<packet info>#<checksum>.
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*
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* where
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* <packet info> :: <characters representing the command or response>
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* <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
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*
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* When a packet is received, it is first acknowledged with either '+' or '-'.
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* '+' indicates a successful transfer. '-' indicates a failed transfer.
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*
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* Example:
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*
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* Host: Reply:
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* $m0,10#2a +$00010203040506070809101112131415#42
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*
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*
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* ==============
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* MORE EXAMPLES:
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* ==============
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*
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* For reference -- the following are the steps that one
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* company took (RidgeRun Inc) to get remote gdb debugging
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* going. In this scenario the host machine was a PC and the
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* target platform was a Galileo EVB64120A MIPS evaluation
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* board.
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*
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* Step 1:
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* First download gdb-5.0.tar.gz from the internet.
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* and then build/install the package.
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*
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* Example:
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* $ tar zxf gdb-5.0.tar.gz
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* $ cd gdb-5.0
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* $ ./configure --target=mips-linux-elf
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* $ make
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* $ install
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* $ which mips-linux-elf-gdb
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* /usr/local/bin/mips-linux-elf-gdb
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*
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* Step 2:
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* Configure linux for remote debugging and build it.
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*
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* Example:
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* $ cd ~/linux
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* $ make menuconfig <go to "Kernel Hacking" and turn on remote debugging>
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* $ make
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*
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* Step 3:
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* Download the kernel to the remote target and start
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* the kernel running. It will promptly halt and wait
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* for the host gdb session to connect. It does this
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* since the "Kernel Hacking" option has defined
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* CONFIG_KGDB which in turn enables your calls
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* to:
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* set_debug_traps();
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* breakpoint();
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*
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* Step 4:
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* Start the gdb session on the host.
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*
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* Example:
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* $ mips-linux-elf-gdb vmlinux
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* (gdb) set remotebaud 115200
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* (gdb) target remote /dev/ttyS1
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* ...at this point you are connected to
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* the remote target and can use gdb
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* in the normal fasion. Setting
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* breakpoints, single stepping,
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* printing variables, etc.
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*/
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/reboot.h>
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#include <asm/asm.h>
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#include <asm/cacheflush.h>
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#include <asm/mipsregs.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/gdb-stub.h>
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#include <asm/inst.h>
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#include <asm/smp.h>
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/*
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* external low-level support routines
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*/
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extern int putDebugChar(char c); /* write a single character */
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extern char getDebugChar(void); /* read and return a single char */
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extern void trap_low(void);
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/*
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* breakpoint and test functions
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*/
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extern void breakpoint(void);
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extern void breakinst(void);
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extern void async_breakpoint(void);
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extern void async_breakinst(void);
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extern void adel(void);
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/*
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* local prototypes
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*/
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static void getpacket(char *buffer);
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static void putpacket(char *buffer);
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static int computeSignal(int tt);
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static int hex(unsigned char ch);
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static int hexToInt(char **ptr, int *intValue);
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static int hexToLong(char **ptr, long *longValue);
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static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault);
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void handle_exception(struct gdb_regs *regs);
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int kgdb_enabled;
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/*
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* spin locks for smp case
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*/
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static DEFINE_SPINLOCK(kgdb_lock);
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static raw_spinlock_t kgdb_cpulock[NR_CPUS] = {
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[0 ... NR_CPUS-1] = __RAW_SPIN_LOCK_UNLOCKED,
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};
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/*
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* BUFMAX defines the maximum number of characters in inbound/outbound buffers
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* at least NUMREGBYTES*2 are needed for register packets
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*/
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#define BUFMAX 2048
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static char input_buffer[BUFMAX];
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static char output_buffer[BUFMAX];
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static int initialized; /* !0 means we've been initialized */
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static int kgdb_started;
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static const char hexchars[]="0123456789abcdef";
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/* Used to prevent crashes in memory access. Note that they'll crash anyway if
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we haven't set up fault handlers yet... */
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int kgdb_read_byte(unsigned char *address, unsigned char *dest);
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int kgdb_write_byte(unsigned char val, unsigned char *dest);
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/*
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* Convert ch from a hex digit to an int
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*/
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static int hex(unsigned char ch)
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{
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if (ch >= 'a' && ch <= 'f')
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return ch-'a'+10;
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if (ch >= '0' && ch <= '9')
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return ch-'0';
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if (ch >= 'A' && ch <= 'F')
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return ch-'A'+10;
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return -1;
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}
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/*
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* scan for the sequence $<data>#<checksum>
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*/
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static void getpacket(char *buffer)
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{
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unsigned char checksum;
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unsigned char xmitcsum;
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int i;
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int count;
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unsigned char ch;
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do {
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/*
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* wait around for the start character,
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* ignore all other characters
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*/
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while ((ch = (getDebugChar() & 0x7f)) != '$') ;
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checksum = 0;
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xmitcsum = -1;
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count = 0;
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/*
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* now, read until a # or end of buffer is found
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*/
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while (count < BUFMAX) {
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ch = getDebugChar();
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if (ch == '#')
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break;
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checksum = checksum + ch;
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buffer[count] = ch;
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count = count + 1;
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}
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if (count >= BUFMAX)
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continue;
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buffer[count] = 0;
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if (ch == '#') {
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xmitcsum = hex(getDebugChar() & 0x7f) << 4;
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xmitcsum |= hex(getDebugChar() & 0x7f);
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if (checksum != xmitcsum)
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putDebugChar('-'); /* failed checksum */
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else {
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putDebugChar('+'); /* successful transfer */
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/*
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* if a sequence char is present,
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* reply the sequence ID
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*/
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if (buffer[2] == ':') {
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putDebugChar(buffer[0]);
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putDebugChar(buffer[1]);
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/*
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* remove sequence chars from buffer
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*/
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count = strlen(buffer);
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for (i=3; i <= count; i++)
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buffer[i-3] = buffer[i];
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}
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}
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}
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}
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while (checksum != xmitcsum);
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}
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/*
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* send the packet in buffer.
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*/
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static void putpacket(char *buffer)
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{
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unsigned char checksum;
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int count;
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unsigned char ch;
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/*
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* $<packet info>#<checksum>.
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*/
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do {
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putDebugChar('$');
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checksum = 0;
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count = 0;
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while ((ch = buffer[count]) != 0) {
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if (!(putDebugChar(ch)))
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return;
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checksum += ch;
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count += 1;
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}
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putDebugChar('#');
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putDebugChar(hexchars[checksum >> 4]);
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putDebugChar(hexchars[checksum & 0xf]);
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}
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while ((getDebugChar() & 0x7f) != '+');
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}
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/*
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* Convert the memory pointed to by mem into hex, placing result in buf.
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* Return a pointer to the last char put in buf (null), in case of mem fault,
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* return 0.
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* may_fault is non-zero if we are reading from arbitrary memory, but is currently
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* not used.
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*/
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static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault)
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{
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unsigned char ch;
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while (count-- > 0) {
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if (kgdb_read_byte(mem++, &ch) != 0)
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return 0;
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*buf++ = hexchars[ch >> 4];
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*buf++ = hexchars[ch & 0xf];
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}
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*buf = 0;
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return buf;
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}
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/*
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* convert the hex array pointed to by buf into binary to be placed in mem
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* return a pointer to the character AFTER the last byte written
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* may_fault is non-zero if we are reading from arbitrary memory, but is currently
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* not used.
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*/
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static char *hex2mem(char *buf, char *mem, int count, int binary, int may_fault)
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{
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int i;
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unsigned char ch;
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for (i=0; i<count; i++)
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{
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if (binary) {
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ch = *buf++;
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if (ch == 0x7d)
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ch = 0x20 ^ *buf++;
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}
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else {
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ch = hex(*buf++) << 4;
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ch |= hex(*buf++);
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}
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if (kgdb_write_byte(ch, mem++) != 0)
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return 0;
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}
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return mem;
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}
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/*
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* This table contains the mapping between SPARC hardware trap types, and
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* signals, which are primarily what GDB understands. It also indicates
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* which hardware traps we need to commandeer when initializing the stub.
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*/
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static struct hard_trap_info {
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unsigned char tt; /* Trap type code for MIPS R3xxx and R4xxx */
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unsigned char signo; /* Signal that we map this trap into */
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} hard_trap_info[] = {
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{ 6, SIGBUS }, /* instruction bus error */
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{ 7, SIGBUS }, /* data bus error */
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{ 9, SIGTRAP }, /* break */
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{ 10, SIGILL }, /* reserved instruction */
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/* { 11, SIGILL }, */ /* CPU unusable */
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{ 12, SIGFPE }, /* overflow */
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{ 13, SIGTRAP }, /* trap */
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{ 14, SIGSEGV }, /* virtual instruction cache coherency */
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{ 15, SIGFPE }, /* floating point exception */
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{ 23, SIGSEGV }, /* watch */
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{ 31, SIGSEGV }, /* virtual data cache coherency */
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{ 0, 0} /* Must be last */
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};
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/* Save the normal trap handlers for user-mode traps. */
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void *saved_vectors[32];
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/*
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* Set up exception handlers for tracing and breakpoints
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*/
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void set_debug_traps(void)
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{
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struct hard_trap_info *ht;
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unsigned long flags;
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unsigned char c;
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local_irq_save(flags);
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
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saved_vectors[ht->tt] = set_except_vector(ht->tt, trap_low);
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putDebugChar('+'); /* 'hello world' */
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/*
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* In case GDB is started before us, ack any packets
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* (presumably "$?#xx") sitting there.
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*/
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while((c = getDebugChar()) != '$');
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while((c = getDebugChar()) != '#');
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c = getDebugChar(); /* eat first csum byte */
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c = getDebugChar(); /* eat second csum byte */
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putDebugChar('+'); /* ack it */
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initialized = 1;
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local_irq_restore(flags);
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}
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void restore_debug_traps(void)
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{
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struct hard_trap_info *ht;
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unsigned long flags;
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local_irq_save(flags);
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
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set_except_vector(ht->tt, saved_vectors[ht->tt]);
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local_irq_restore(flags);
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}
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/*
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* Convert the MIPS hardware trap type code to a Unix signal number.
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*/
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static int computeSignal(int tt)
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{
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struct hard_trap_info *ht;
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
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if (ht->tt == tt)
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return ht->signo;
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return SIGHUP; /* default for things we don't know about */
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}
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/*
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* While we find nice hex chars, build an int.
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* Return number of chars processed.
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*/
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static int hexToInt(char **ptr, int *intValue)
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{
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int numChars = 0;
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int hexValue;
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*intValue = 0;
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while (**ptr) {
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hexValue = hex(**ptr);
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if (hexValue < 0)
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break;
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*intValue = (*intValue << 4) | hexValue;
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numChars ++;
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(*ptr)++;
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}
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return (numChars);
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}
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static int hexToLong(char **ptr, long *longValue)
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{
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int numChars = 0;
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int hexValue;
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*longValue = 0;
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while (**ptr) {
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hexValue = hex(**ptr);
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if (hexValue < 0)
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break;
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*longValue = (*longValue << 4) | hexValue;
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numChars ++;
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(*ptr)++;
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}
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return numChars;
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}
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#if 0
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/*
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* Print registers (on target console)
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* Used only to debug the stub...
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*/
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void show_gdbregs(struct gdb_regs * regs)
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{
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/*
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* Saved main processor registers
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*/
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printk("$0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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regs->reg0, regs->reg1, regs->reg2, regs->reg3,
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regs->reg4, regs->reg5, regs->reg6, regs->reg7);
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printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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regs->reg8, regs->reg9, regs->reg10, regs->reg11,
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regs->reg12, regs->reg13, regs->reg14, regs->reg15);
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printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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regs->reg16, regs->reg17, regs->reg18, regs->reg19,
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regs->reg20, regs->reg21, regs->reg22, regs->reg23);
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printk("$24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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regs->reg24, regs->reg25, regs->reg26, regs->reg27,
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regs->reg28, regs->reg29, regs->reg30, regs->reg31);
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/*
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* Saved cp0 registers
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*/
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printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\n",
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regs->cp0_epc, regs->cp0_status, regs->cp0_cause);
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}
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#endif /* dead code */
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/*
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* We single-step by setting breakpoints. When an exception
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* is handled, we need to restore the instructions hoisted
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* when the breakpoints were set.
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*
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* This is where we save the original instructions.
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*/
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static struct gdb_bp_save {
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unsigned long addr;
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unsigned int val;
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} step_bp[2];
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#define BP 0x0000000d /* break opcode */
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/*
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* Set breakpoint instructions for single stepping.
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*/
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static void single_step(struct gdb_regs *regs)
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{
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union mips_instruction insn;
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unsigned long targ;
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int is_branch, is_cond, i;
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|
|
targ = regs->cp0_epc;
|
|
insn.word = *(unsigned int *)targ;
|
|
is_branch = is_cond = 0;
|
|
|
|
switch (insn.i_format.opcode) {
|
|
/*
|
|
* jr and jalr are in r_format format.
|
|
*/
|
|
case spec_op:
|
|
switch (insn.r_format.func) {
|
|
case jalr_op:
|
|
case jr_op:
|
|
targ = *(®s->reg0 + insn.r_format.rs);
|
|
is_branch = 1;
|
|
break;
|
|
}
|
|
break;
|
|
|
|
/*
|
|
* This group contains:
|
|
* bltz_op, bgez_op, bltzl_op, bgezl_op,
|
|
* bltzal_op, bgezal_op, bltzall_op, bgezall_op.
|
|
*/
|
|
case bcond_op:
|
|
is_branch = is_cond = 1;
|
|
targ += 4 + (insn.i_format.simmediate << 2);
|
|
break;
|
|
|
|
/*
|
|
* These are unconditional and in j_format.
|
|
*/
|
|
case jal_op:
|
|
case j_op:
|
|
is_branch = 1;
|
|
targ += 4;
|
|
targ >>= 28;
|
|
targ <<= 28;
|
|
targ |= (insn.j_format.target << 2);
|
|
break;
|
|
|
|
/*
|
|
* These are conditional.
|
|
*/
|
|
case beq_op:
|
|
case beql_op:
|
|
case bne_op:
|
|
case bnel_op:
|
|
case blez_op:
|
|
case blezl_op:
|
|
case bgtz_op:
|
|
case bgtzl_op:
|
|
case cop0_op:
|
|
case cop1_op:
|
|
case cop2_op:
|
|
case cop1x_op:
|
|
is_branch = is_cond = 1;
|
|
targ += 4 + (insn.i_format.simmediate << 2);
|
|
break;
|
|
}
|
|
|
|
if (is_branch) {
|
|
i = 0;
|
|
if (is_cond && targ != (regs->cp0_epc + 8)) {
|
|
step_bp[i].addr = regs->cp0_epc + 8;
|
|
step_bp[i++].val = *(unsigned *)(regs->cp0_epc + 8);
|
|
*(unsigned *)(regs->cp0_epc + 8) = BP;
|
|
}
|
|
step_bp[i].addr = targ;
|
|
step_bp[i].val = *(unsigned *)targ;
|
|
*(unsigned *)targ = BP;
|
|
} else {
|
|
step_bp[0].addr = regs->cp0_epc + 4;
|
|
step_bp[0].val = *(unsigned *)(regs->cp0_epc + 4);
|
|
*(unsigned *)(regs->cp0_epc + 4) = BP;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* If asynchronously interrupted by gdb, then we need to set a breakpoint
|
|
* at the interrupted instruction so that we wind up stopped with a
|
|
* reasonable stack frame.
|
|
*/
|
|
static struct gdb_bp_save async_bp;
|
|
|
|
/*
|
|
* Swap the interrupted EPC with our asynchronous breakpoint routine.
|
|
* This is safer than stuffing the breakpoint in-place, since no cache
|
|
* flushes (or resulting smp_call_functions) are required. The
|
|
* assumption is that only one CPU will be handling asynchronous bp's,
|
|
* and only one can be active at a time.
|
|
*/
|
|
extern spinlock_t smp_call_lock;
|
|
|
|
void set_async_breakpoint(unsigned long *epc)
|
|
{
|
|
/* skip breaking into userland */
|
|
if ((*epc & 0x80000000) == 0)
|
|
return;
|
|
|
|
#ifdef CONFIG_SMP
|
|
/* avoid deadlock if someone is make IPC */
|
|
if (spin_is_locked(&smp_call_lock))
|
|
return;
|
|
#endif
|
|
|
|
async_bp.addr = *epc;
|
|
*epc = (unsigned long)async_breakpoint;
|
|
}
|
|
|
|
static void kgdb_wait(void *arg)
|
|
{
|
|
unsigned flags;
|
|
int cpu = smp_processor_id();
|
|
|
|
local_irq_save(flags);
|
|
|
|
__raw_spin_lock(&kgdb_cpulock[cpu]);
|
|
__raw_spin_unlock(&kgdb_cpulock[cpu]);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
/*
|
|
* GDB stub needs to call kgdb_wait on all processor with interrupts
|
|
* disabled, so it uses it's own special variant.
|
|
*/
|
|
static int kgdb_smp_call_kgdb_wait(void)
|
|
{
|
|
#ifdef CONFIG_SMP
|
|
struct call_data_struct data;
|
|
int i, cpus = num_online_cpus() - 1;
|
|
int cpu = smp_processor_id();
|
|
|
|
/*
|
|
* Can die spectacularly if this CPU isn't yet marked online
|
|
*/
|
|
BUG_ON(!cpu_online(cpu));
|
|
|
|
if (!cpus)
|
|
return 0;
|
|
|
|
if (spin_is_locked(&smp_call_lock)) {
|
|
/*
|
|
* Some other processor is trying to make us do something
|
|
* but we're not going to respond... give up
|
|
*/
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* We will continue here, accepting the fact that
|
|
* the kernel may deadlock if another CPU attempts
|
|
* to call smp_call_function now...
|
|
*/
|
|
|
|
data.func = kgdb_wait;
|
|
data.info = NULL;
|
|
atomic_set(&data.started, 0);
|
|
data.wait = 0;
|
|
|
|
spin_lock(&smp_call_lock);
|
|
call_data = &data;
|
|
mb();
|
|
|
|
/* Send a message to all other CPUs and wait for them to respond */
|
|
for (i = 0; i < NR_CPUS; i++)
|
|
if (cpu_online(i) && i != cpu)
|
|
core_send_ipi(i, SMP_CALL_FUNCTION);
|
|
|
|
/* Wait for response */
|
|
/* FIXME: lock-up detection, backtrace on lock-up */
|
|
while (atomic_read(&data.started) != cpus)
|
|
barrier();
|
|
|
|
call_data = NULL;
|
|
spin_unlock(&smp_call_lock);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This function does all command processing for interfacing to gdb. It
|
|
* returns 1 if you should skip the instruction at the trap address, 0
|
|
* otherwise.
|
|
*/
|
|
void handle_exception (struct gdb_regs *regs)
|
|
{
|
|
int trap; /* Trap type */
|
|
int sigval;
|
|
long addr;
|
|
int length;
|
|
char *ptr;
|
|
unsigned long *stack;
|
|
int i;
|
|
int bflag = 0;
|
|
|
|
kgdb_started = 1;
|
|
|
|
/*
|
|
* acquire the big kgdb spinlock
|
|
*/
|
|
if (!spin_trylock(&kgdb_lock)) {
|
|
/*
|
|
* some other CPU has the lock, we should go back to
|
|
* receive the gdb_wait IPC
|
|
*/
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* If we're in async_breakpoint(), restore the real EPC from
|
|
* the breakpoint.
|
|
*/
|
|
if (regs->cp0_epc == (unsigned long)async_breakinst) {
|
|
regs->cp0_epc = async_bp.addr;
|
|
async_bp.addr = 0;
|
|
}
|
|
|
|
/*
|
|
* acquire the CPU spinlocks
|
|
*/
|
|
for (i = num_online_cpus()-1; i >= 0; i--)
|
|
if (__raw_spin_trylock(&kgdb_cpulock[i]) == 0)
|
|
panic("kgdb: couldn't get cpulock %d\n", i);
|
|
|
|
/*
|
|
* force other cpus to enter kgdb
|
|
*/
|
|
kgdb_smp_call_kgdb_wait();
|
|
|
|
/*
|
|
* If we're in breakpoint() increment the PC
|
|
*/
|
|
trap = (regs->cp0_cause & 0x7c) >> 2;
|
|
if (trap == 9 && regs->cp0_epc == (unsigned long)breakinst)
|
|
regs->cp0_epc += 4;
|
|
|
|
/*
|
|
* If we were single_stepping, restore the opcodes hoisted
|
|
* for the breakpoint[s].
|
|
*/
|
|
if (step_bp[0].addr) {
|
|
*(unsigned *)step_bp[0].addr = step_bp[0].val;
|
|
step_bp[0].addr = 0;
|
|
|
|
if (step_bp[1].addr) {
|
|
*(unsigned *)step_bp[1].addr = step_bp[1].val;
|
|
step_bp[1].addr = 0;
|
|
}
|
|
}
|
|
|
|
stack = (long *)regs->reg29; /* stack ptr */
|
|
sigval = computeSignal(trap);
|
|
|
|
/*
|
|
* reply to host that an exception has occurred
|
|
*/
|
|
ptr = output_buffer;
|
|
|
|
/*
|
|
* Send trap type (converted to signal)
|
|
*/
|
|
*ptr++ = 'T';
|
|
*ptr++ = hexchars[sigval >> 4];
|
|
*ptr++ = hexchars[sigval & 0xf];
|
|
|
|
/*
|
|
* Send Error PC
|
|
*/
|
|
*ptr++ = hexchars[REG_EPC >> 4];
|
|
*ptr++ = hexchars[REG_EPC & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®s->cp0_epc, ptr, sizeof(long), 0);
|
|
*ptr++ = ';';
|
|
|
|
/*
|
|
* Send frame pointer
|
|
*/
|
|
*ptr++ = hexchars[REG_FP >> 4];
|
|
*ptr++ = hexchars[REG_FP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®s->reg30, ptr, sizeof(long), 0);
|
|
*ptr++ = ';';
|
|
|
|
/*
|
|
* Send stack pointer
|
|
*/
|
|
*ptr++ = hexchars[REG_SP >> 4];
|
|
*ptr++ = hexchars[REG_SP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®s->reg29, ptr, sizeof(long), 0);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = 0;
|
|
putpacket(output_buffer); /* send it off... */
|
|
|
|
/*
|
|
* Wait for input from remote GDB
|
|
*/
|
|
while (1) {
|
|
output_buffer[0] = 0;
|
|
getpacket(input_buffer);
|
|
|
|
switch (input_buffer[0])
|
|
{
|
|
case '?':
|
|
output_buffer[0] = 'S';
|
|
output_buffer[1] = hexchars[sigval >> 4];
|
|
output_buffer[2] = hexchars[sigval & 0xf];
|
|
output_buffer[3] = 0;
|
|
break;
|
|
|
|
/*
|
|
* Detach debugger; let CPU run
|
|
*/
|
|
case 'D':
|
|
putpacket(output_buffer);
|
|
goto finish_kgdb;
|
|
break;
|
|
|
|
case 'd':
|
|
/* toggle debug flag */
|
|
break;
|
|
|
|
/*
|
|
* Return the value of the CPU registers
|
|
*/
|
|
case 'g':
|
|
ptr = output_buffer;
|
|
ptr = mem2hex((char *)®s->reg0, ptr, 32*sizeof(long), 0); /* r0...r31 */
|
|
ptr = mem2hex((char *)®s->cp0_status, ptr, 6*sizeof(long), 0); /* cp0 */
|
|
ptr = mem2hex((char *)®s->fpr0, ptr, 32*sizeof(long), 0); /* f0...31 */
|
|
ptr = mem2hex((char *)®s->cp1_fsr, ptr, 2*sizeof(long), 0); /* cp1 */
|
|
ptr = mem2hex((char *)®s->frame_ptr, ptr, 2*sizeof(long), 0); /* frp */
|
|
ptr = mem2hex((char *)®s->cp0_index, ptr, 16*sizeof(long), 0); /* cp0 */
|
|
break;
|
|
|
|
/*
|
|
* set the value of the CPU registers - return OK
|
|
*/
|
|
case 'G':
|
|
{
|
|
ptr = &input_buffer[1];
|
|
hex2mem(ptr, (char *)®s->reg0, 32*sizeof(long), 0, 0);
|
|
ptr += 32*(2*sizeof(long));
|
|
hex2mem(ptr, (char *)®s->cp0_status, 6*sizeof(long), 0, 0);
|
|
ptr += 6*(2*sizeof(long));
|
|
hex2mem(ptr, (char *)®s->fpr0, 32*sizeof(long), 0, 0);
|
|
ptr += 32*(2*sizeof(long));
|
|
hex2mem(ptr, (char *)®s->cp1_fsr, 2*sizeof(long), 0, 0);
|
|
ptr += 2*(2*sizeof(long));
|
|
hex2mem(ptr, (char *)®s->frame_ptr, 2*sizeof(long), 0, 0);
|
|
ptr += 2*(2*sizeof(long));
|
|
hex2mem(ptr, (char *)®s->cp0_index, 16*sizeof(long), 0, 0);
|
|
strcpy(output_buffer,"OK");
|
|
}
|
|
break;
|
|
|
|
/*
|
|
* mAA..AA,LLLL Read LLLL bytes at address AA..AA
|
|
*/
|
|
case 'm':
|
|
ptr = &input_buffer[1];
|
|
|
|
if (hexToLong(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length)) {
|
|
if (mem2hex((char *)addr, output_buffer, length, 1))
|
|
break;
|
|
strcpy (output_buffer, "E03");
|
|
} else
|
|
strcpy(output_buffer,"E01");
|
|
break;
|
|
|
|
/*
|
|
* XAA..AA,LLLL: Write LLLL escaped binary bytes at address AA.AA
|
|
*/
|
|
case 'X':
|
|
bflag = 1;
|
|
/* fall through */
|
|
|
|
/*
|
|
* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK
|
|
*/
|
|
case 'M':
|
|
ptr = &input_buffer[1];
|
|
|
|
if (hexToLong(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length)
|
|
&& *ptr++ == ':') {
|
|
if (hex2mem(ptr, (char *)addr, length, bflag, 1))
|
|
strcpy(output_buffer, "OK");
|
|
else
|
|
strcpy(output_buffer, "E03");
|
|
}
|
|
else
|
|
strcpy(output_buffer, "E02");
|
|
break;
|
|
|
|
/*
|
|
* cAA..AA Continue at address AA..AA(optional)
|
|
*/
|
|
case 'c':
|
|
/* try to read optional parameter, pc unchanged if no parm */
|
|
|
|
ptr = &input_buffer[1];
|
|
if (hexToLong(&ptr, &addr))
|
|
regs->cp0_epc = addr;
|
|
|
|
goto exit_kgdb_exception;
|
|
break;
|
|
|
|
/*
|
|
* kill the program; let us try to restart the machine
|
|
* Reset the whole machine.
|
|
*/
|
|
case 'k':
|
|
case 'r':
|
|
machine_restart("kgdb restarts machine");
|
|
break;
|
|
|
|
/*
|
|
* Step to next instruction
|
|
*/
|
|
case 's':
|
|
/*
|
|
* There is no single step insn in the MIPS ISA, so we
|
|
* use breakpoints and continue, instead.
|
|
*/
|
|
single_step(regs);
|
|
goto exit_kgdb_exception;
|
|
/* NOTREACHED */
|
|
break;
|
|
|
|
/*
|
|
* Set baud rate (bBB)
|
|
* FIXME: Needs to be written
|
|
*/
|
|
case 'b':
|
|
{
|
|
#if 0
|
|
int baudrate;
|
|
extern void set_timer_3();
|
|
|
|
ptr = &input_buffer[1];
|
|
if (!hexToInt(&ptr, &baudrate))
|
|
{
|
|
strcpy(output_buffer,"B01");
|
|
break;
|
|
}
|
|
|
|
/* Convert baud rate to uart clock divider */
|
|
|
|
switch (baudrate)
|
|
{
|
|
case 38400:
|
|
baudrate = 16;
|
|
break;
|
|
case 19200:
|
|
baudrate = 33;
|
|
break;
|
|
case 9600:
|
|
baudrate = 65;
|
|
break;
|
|
default:
|
|
baudrate = 0;
|
|
strcpy(output_buffer,"B02");
|
|
goto x1;
|
|
}
|
|
|
|
if (baudrate) {
|
|
putpacket("OK"); /* Ack before changing speed */
|
|
set_timer_3(baudrate); /* Set it */
|
|
}
|
|
#endif
|
|
}
|
|
break;
|
|
|
|
} /* switch */
|
|
|
|
/*
|
|
* reply to the request
|
|
*/
|
|
|
|
putpacket(output_buffer);
|
|
|
|
} /* while */
|
|
|
|
return;
|
|
|
|
finish_kgdb:
|
|
restore_debug_traps();
|
|
|
|
exit_kgdb_exception:
|
|
/* release locks so other CPUs can go */
|
|
for (i = num_online_cpus()-1; i >= 0; i--)
|
|
__raw_spin_unlock(&kgdb_cpulock[i]);
|
|
spin_unlock(&kgdb_lock);
|
|
|
|
__flush_cache_all();
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* This function will generate a breakpoint exception. It is used at the
|
|
* beginning of a program to sync up with a debugger and can be used
|
|
* otherwise as a quick means to stop program execution and "break" into
|
|
* the debugger.
|
|
*/
|
|
void breakpoint(void)
|
|
{
|
|
if (!initialized)
|
|
return;
|
|
|
|
__asm__ __volatile__(
|
|
".globl breakinst\n\t"
|
|
".set\tnoreorder\n\t"
|
|
"nop\n"
|
|
"breakinst:\tbreak\n\t"
|
|
"nop\n\t"
|
|
".set\treorder"
|
|
);
|
|
}
|
|
|
|
/* Nothing but the break; don't pollute any registers */
|
|
void async_breakpoint(void)
|
|
{
|
|
__asm__ __volatile__(
|
|
".globl async_breakinst\n\t"
|
|
".set\tnoreorder\n\t"
|
|
"nop\n"
|
|
"async_breakinst:\tbreak\n\t"
|
|
"nop\n\t"
|
|
".set\treorder"
|
|
);
|
|
}
|
|
|
|
void adel(void)
|
|
{
|
|
__asm__ __volatile__(
|
|
".globl\tadel\n\t"
|
|
"lui\t$8,0x8000\n\t"
|
|
"lw\t$9,1($8)\n\t"
|
|
);
|
|
}
|
|
|
|
/*
|
|
* malloc is needed by gdb client in "call func()", even a private one
|
|
* will make gdb happy
|
|
*/
|
|
static void * __attribute_used__ malloc(size_t size)
|
|
{
|
|
return kmalloc(size, GFP_ATOMIC);
|
|
}
|
|
|
|
static void __attribute_used__ free (void *where)
|
|
{
|
|
kfree(where);
|
|
}
|
|
|
|
#ifdef CONFIG_GDB_CONSOLE
|
|
|
|
void gdb_putsn(const char *str, int l)
|
|
{
|
|
char outbuf[18];
|
|
|
|
if (!kgdb_started)
|
|
return;
|
|
|
|
outbuf[0]='O';
|
|
|
|
while(l) {
|
|
int i = (l>8)?8:l;
|
|
mem2hex((char *)str, &outbuf[1], i, 0);
|
|
outbuf[(i*2)+1]=0;
|
|
putpacket(outbuf);
|
|
str += i;
|
|
l -= i;
|
|
}
|
|
}
|
|
|
|
static void gdb_console_write(struct console *con, const char *s, unsigned n)
|
|
{
|
|
gdb_putsn(s, n);
|
|
}
|
|
|
|
static struct console gdb_console = {
|
|
.name = "gdb",
|
|
.write = gdb_console_write,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1
|
|
};
|
|
|
|
static int __init register_gdb_console(void)
|
|
{
|
|
register_console(&gdb_console);
|
|
|
|
return 0;
|
|
}
|
|
|
|
console_initcall(register_gdb_console);
|
|
|
|
#endif
|