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1b1f42d8fd
This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
123 lines
3.1 KiB
C
123 lines
3.1 KiB
C
/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef DRM_SCHEDULER_SPSC_QUEUE_H_
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#define DRM_SCHEDULER_SPSC_QUEUE_H_
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#include <linux/atomic.h>
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#include <linux/preempt.h>
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/** SPSC lockless queue */
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struct spsc_node {
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/* Stores spsc_node* */
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struct spsc_node *next;
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};
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struct spsc_queue {
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struct spsc_node *head;
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/* atomic pointer to struct spsc_node* */
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atomic_long_t tail;
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atomic_t job_count;
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};
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static inline void spsc_queue_init(struct spsc_queue *queue)
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{
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queue->head = NULL;
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atomic_long_set(&queue->tail, (long)&queue->head);
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atomic_set(&queue->job_count, 0);
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}
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static inline struct spsc_node *spsc_queue_peek(struct spsc_queue *queue)
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{
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return queue->head;
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}
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static inline int spsc_queue_count(struct spsc_queue *queue)
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{
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return atomic_read(&queue->job_count);
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}
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static inline bool spsc_queue_push(struct spsc_queue *queue, struct spsc_node *node)
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{
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struct spsc_node **tail;
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node->next = NULL;
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preempt_disable();
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tail = (struct spsc_node **)atomic_long_xchg(&queue->tail, (long)&node->next);
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WRITE_ONCE(*tail, node);
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atomic_inc(&queue->job_count);
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/*
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* In case of first element verify new node will be visible to the consumer
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* thread when we ping the kernel thread that there is new work to do.
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*/
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smp_wmb();
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preempt_enable();
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return tail == &queue->head;
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}
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static inline struct spsc_node *spsc_queue_pop(struct spsc_queue *queue)
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{
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struct spsc_node *next, *node;
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/* Verify reading from memory and not the cache */
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smp_rmb();
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node = READ_ONCE(queue->head);
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if (!node)
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return NULL;
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next = READ_ONCE(node->next);
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WRITE_ONCE(queue->head, next);
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if (unlikely(!next)) {
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/* slowpath for the last element in the queue */
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if (atomic_long_cmpxchg(&queue->tail,
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(long)&node->next, (long) &queue->head) != (long)&node->next) {
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/* Updating tail failed wait for new next to appear */
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do {
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smp_rmb();
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} while (unlikely(!(queue->head = READ_ONCE(node->next))));
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}
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}
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atomic_dec(&queue->job_count);
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return node;
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}
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#endif /* DRM_SCHEDULER_SPSC_QUEUE_H_ */
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