mirror of
https://github.com/edk2-porting/linux-next.git
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dec1fbbc1d
* Spelling * http to https updates NAND core changes: * Drop useless 'depends on' in Kconfig * Add an extra level in the Kconfig hierarchy * Trivial spellings * Dynamic allocation of the interface configurations * Dropping the default ONFI timing mode * Various cleanup (types, structures, naming, comments) * Hide the chip->data_interface indirection * Add the generic rb-gpios property * Add the ->choose_interface_config() hook * Introduce nand_choose_best_sdr_timings() * Use default values for tPROG_max and tBERS_max * Avoid redefining tR_max and tCCS_min * Add a helper to find the closest ONFI mode * bcm63xx MTD parsers: simplify CFE detection Raw NAND controller drivers changes: * fsl-upm: Deprecation of specific DT properties * fsl_upm: Driver rework and cleanup in favor of ->exec_op() * Ingenic: Cleanup ARRAY_SIZE() vs sizeof() use * brcmnand: ECC error handling on EDU transfers * brcmnand: Don't default to EDU transfers * qcom: Set BAM mode only if not set already * qcom: Avoid write to unavailable register * gpio: Driver rework in favor of ->exec_op() * tango: ->exec_op() conversion * mtk: ->exec_op() conversion Raw NAND chip drivers changes: * toshiba: Implement ->choose_interface_config() for TH58NVG2S3HBAI4 * toshiba: Implement ->choose_interface_config() for TC58NVG0S3E * toshiba: Implement ->choose_interface_config() for TC58TEG5DCLTA00 * hynix: Implement ->choose_interface_config() for H27UCG8T2ATR-BC SPI NOR core changes: * Disable Quad Mode in spi_nor_restore(). * Don't abort BFPT parsing when QER reserved value is used. * Add support/update capabilities for few flashes. * Drop s70fl01gs flash: it does not support RDSR(05h) which is critical for erase/write. * Merge the SPIMEM DTR bits in spi-nor/next to avoid conflicts during the release cycle. SPI NOR controller drivers changes: * Move the cadence-quadspi driver to spi-mem. The series was taken through the SPI tree. Merge it also in spi-nor/next to avoid conflicts during the release cycle. * intel-spi: - Add new PCI IDs. - Ignore the Write Disable command, the controller doesn't support it. - Fix performance regression. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAl8vJtMACgkQJWrqGEe9 VoRdGAf/Y5m5BwmLilkEYpffyxi7dVR6XOKPLU5EJXkS3dPvH9398zchbHOdedCZ OzJIfh6Iv+qbkgS2g0lAAT+SAfOfG9plubvSdkjrHXl4eZXRnR/49RF5LAEju7sz Uw1HdRcawyEi5uI9yYS0tCeVMIUJq+5x7VibH+82yOIdSPc60c7FDc5ih/nVKj/a Pn9LOzGzkdndcE1b3FcF2Uk/T1YOJx3Yt5ngALlPpJxaDZmQSHtYPuuz8DfUbamf uj3CkpqYRyT18CzuFvtuba6LyF+donXNJgvl6ivW7dlRSPzSMnDQu7J5bpNhUfcd p/ZdzX1Jxle4theDm0J9ALsSSM5g2w== =RiY8 -----END PGP SIGNATURE----- Merge tag 'mtd/for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD core changes: - Spelling - http to https updates NAND core changes: - Drop useless 'depends on' in Kconfig - Add an extra level in the Kconfig hierarchy - Trivial spellings - Dynamic allocation of the interface configurations - Dropping the default ONFI timing mode - Various cleanup (types, structures, naming, comments) - Hide the chip->data_interface indirection - Add the generic rb-gpios property - Add the ->choose_interface_config() hook - Introduce nand_choose_best_sdr_timings() - Use default values for tPROG_max and tBERS_max - Avoid redefining tR_max and tCCS_min - Add a helper to find the closest ONFI mode - bcm63xx MTD parsers: simplify CFE detection Raw NAND controller drivers changes: - fsl-upm: Deprecation of specific DT properties - fsl_upm: Driver rework and cleanup in favor of ->exec_op() - Ingenic: Cleanup ARRAY_SIZE() vs sizeof() use - brcmnand: ECC error handling on EDU transfers - brcmnand: Don't default to EDU transfers - qcom: Set BAM mode only if not set already - qcom: Avoid write to unavailable register - gpio: Driver rework in favor of ->exec_op() - tango: ->exec_op() conversion - mtk: ->exec_op() conversion Raw NAND chip drivers changes: - toshiba: Implement ->choose_interface_config() for TH58NVG2S3HBAI4, TC58NVG0S3E, and TC58TEG5DCLTA00 - hynix: Implement ->choose_interface_config() for H27UCG8T2ATR-BC SPI NOR core changes: - Disable Quad Mode in spi_nor_restore(). - Don't abort BFPT parsing when QER reserved value is used. - Add support/update capabilities for few flashes. - Drop s70fl01gs flash: it does not support RDSR(05h) which is critical for erase/write. - Merge the SPIMEM DTR bits in spi-nor/next to avoid conflicts during the release cycle. SPI NOR controller drivers changes: - Move the cadence-quadspi driver to spi-mem. The series was taken through the SPI tree. Merge it also in spi-nor/next to avoid conflicts during the release cycle. - intel-spi: - Add new PCI IDs. - Ignore the Write Disable command, the controller doesn't support it. - Fix performance regression" * tag 'mtd/for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (79 commits) MTD: pfow.h: drop a duplicated word MTD: mtd-abi.h: drop a duplicated word mtd: rawnand: omap_elm: Replace HTTP links with HTTPS ones mtd: Replace HTTP links with HTTPS ones mtd: hyperbus: Replace HTTP links with HTTPS ones mtd: revert "spi-nor: intel: provide a range for poll_timout" mtd: spi-nor: update read capabilities for w25q64 and s25fl064k mtd: spi-nor: micron: Add SPI_NOR_DUAL_READ flag on mt25qu02g mtd: spi-nor: macronix: Add support for mx66u2g45g mtd: spi-nor: intel-spi: Simulate WRDI command mtd: spi-nor: Disable the flash quad mode in spi_nor_restore() mtd: spi-nor: Add capability to disable flash quad mode mtd: spi-nor: spansion: Remove s70fl01gs from flash_info mtd: spi-nor: sfdp: do not make invalid quad enable fatal dt-bindings: mtd: fsl-upm-nand: Deprecate chip-delay and fsl, upm-wait-flags mtd: rawnand: stm32_fmc2: get resources from parent node mtd: rawnand: stm32_fmc2: use regmap APIs memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver dt-bindings: memory-controller: add STM32 FMC2 EBI controller documentation dt-bindings: mtd: update STM32 FMC2 NAND controller documentation ...
205 lines
6.9 KiB
Plaintext
205 lines
6.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Memory devices
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#
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menuconfig MEMORY
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bool "Memory Controller drivers"
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help
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This option allows to enable specific memory controller drivers,
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useful mostly on embedded systems. These could be controllers
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for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features
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vary from memory tuning and frequency scaling to enabling
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access to attached peripherals through memory bus.
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if MEMORY
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config DDR
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bool
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help
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Data from JEDEC specs for DDR SDRAM memories,
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particularly the AC timing parameters and addressing
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information. This data is useful for drivers handling
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DDR SDRAM controllers.
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config ARM_PL172_MPMC
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tristate "ARM PL172 MPMC driver"
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depends on ARM_AMBA && OF
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help
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This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
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If you have an embedded system with an AMBA bus and a PL172
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controller, say Y or M here.
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config ATMEL_SDRAMC
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bool "Atmel (Multi-port DDR-)SDRAM Controller"
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default y
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depends on ARCH_AT91 && OF
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help
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This driver is for Atmel SDRAM Controller or Atmel Multi-port
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DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
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Starting with the at91sam9g45, this controller supports SDR, DDR and
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LP-DDR memories.
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config ATMEL_EBI
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bool "Atmel EBI driver"
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default y
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depends on ARCH_AT91 && OF
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select MFD_SYSCON
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select MFD_ATMEL_SMC
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help
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Driver for Atmel EBI controller.
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Used to configure the EBI (external bus interface) when the device-
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tree is used. This bus supports NANDs, external ethernet controller,
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SRAMs, ATA devices, etc.
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config BT1_L2_CTL
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bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
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depends on MIPS_BAIKAL_T1 || COMPILE_TEST
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select MFD_SYSCON
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help
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Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
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resides Coherency Manager v2 with embedded 1MB L2-cache. It's
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possible to tune the L2 cache performance up by setting the data,
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tags and way-select latencies of RAM access. This driver provides a
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dt properties-based and sysfs interface for it.
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config TI_AEMIF
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tristate "Texas Instruments AEMIF driver"
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depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
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help
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This driver is for the AEMIF module available in Texas Instruments
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SoCs. AEMIF stands for Asynchronous External Memory Interface and
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is intended to provide a glue-less interface to a variety of
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asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
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of 256M bytes of any of these memories can be accessed at a given
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time via four chip selects with 64M byte access per chip select.
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config TI_EMIF
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tristate "Texas Instruments EMIF driver"
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depends on ARCH_OMAP2PLUS
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select DDR
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help
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This driver is for the EMIF module available in Texas Instruments
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SoCs. EMIF is an SDRAM controller that, based on its revision,
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supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
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This driver takes care of only LPDDR2 memories presently. The
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functions of the driver includes re-configuring AC timing
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parameters and other settings during frequency, voltage and
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temperature changes
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config OMAP_GPMC
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bool
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select GPIOLIB
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help
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This driver is for the General Purpose Memory Controller (GPMC)
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present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
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interfacing to a variety of asynchronous as well as synchronous
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memory drives like NOR, NAND, OneNAND, SRAM.
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config OMAP_GPMC_DEBUG
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bool "Enable GPMC debug output and skip reset of GPMC during init"
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depends on OMAP_GPMC
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help
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Enables verbose debugging mostly to decode the bootloader provided
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timings. To preserve the bootloader provided timings, the reset
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of GPMC is skipped during init. Enable this during development to
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configure devices connected to the GPMC bus.
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NOTE: In addition to matching the register setup with the bootloader
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you also need to match the GPMC FCLK frequency used by the
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bootloader or else the GPMC timings won't be identical with the
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bootloader timings.
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config TI_EMIF_SRAM
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tristate "Texas Instruments EMIF SRAM driver"
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depends on (SOC_AM33XX || SOC_AM43XX) && SRAM
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help
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This driver is for the EMIF module available on Texas Instruments
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AM33XX and AM43XX SoCs and is required for PM. Certain parts of
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the EMIF PM code must run from on-chip SRAM late in the suspend
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sequence so this driver provides several relocatable PM functions
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for the SoC PM code to use.
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config MVEBU_DEVBUS
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bool "Marvell EBU Device Bus Controller"
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default y
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depends on PLAT_ORION && OF
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help
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This driver is for the Device Bus controller available in some
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Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
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Armada 370 and Armada XP. This controller allows to handle flash
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devices such as NOR, NAND, SRAM, and FPGA.
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config FSL_CORENET_CF
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tristate "Freescale CoreNet Error Reporting"
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depends on FSL_SOC_BOOKE
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help
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Say Y for reporting of errors from the Freescale CoreNet
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Coherency Fabric. Errors reported include accesses to
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physical addresses that mapped by no local access window
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(LAW) or an invalid LAW, as well as bad cache state that
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represents a coherency violation.
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config FSL_IFC
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bool
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depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
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depends on HAS_IOMEM
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config JZ4780_NEMC
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bool "Ingenic JZ4780 SoC NEMC driver"
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depends on MIPS || COMPILE_TEST
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depends on HAS_IOMEM && OF
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help
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This driver is for the NAND/External Memory Controller (NEMC) in
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the Ingenic JZ4780. This controller is used to handle external
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memory devices such as NAND and SRAM.
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config MTK_SMI
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bool
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depends on ARCH_MEDIATEK || COMPILE_TEST
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help
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This driver is for the Memory Controller module in MediaTek SoCs,
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mainly help enable/disable iommu and control the power domain and
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clocks for each local arbiter.
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config DA8XX_DDRCTL
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bool "Texas Instruments da8xx DDR2/mDDR driver"
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depends on ARCH_DAVINCI_DA8XX
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help
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This driver is for the DDR2/mDDR Memory Controller present on
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Texas Instruments da8xx SoCs. It's used to tweak various memory
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controller configuration options.
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config PL353_SMC
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tristate "ARM PL35X Static Memory Controller(SMC) driver"
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default y
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depends on ARM
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depends on ARM_AMBA
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help
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This driver is for the ARM PL351/PL353 Static Memory
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Controller(SMC) module.
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config RENESAS_RPCIF
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tristate "Renesas RPC-IF driver"
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depends on ARCH_RENESAS
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select REGMAP_MMIO
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help
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This supports Renesas R-Car Gen3 RPC-IF which provides either SPI
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host or HyperFlash. You'll have to select individual components
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under the corresponding menu.
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config STM32_FMC2_EBI
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tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
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depends on MACH_STM32MP157 || COMPILE_TEST
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select MFD_SYSCON
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help
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Select this option to enable the STM32 FMC2 External Bus Interface
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controller. This driver configures the transactions with external
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devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
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SOCs containing the FMC2 External Bus Interface.
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source "drivers/memory/samsung/Kconfig"
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source "drivers/memory/tegra/Kconfig"
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endif
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