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https://github.com/edk2-porting/linux-next.git
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e986211827
Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
53 lines
1.3 KiB
C
53 lines
1.3 KiB
C
/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: James Liao <jamesjj.liao@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DRV_CLK_GATE_H
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#define __DRV_CLK_GATE_H
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#include <linux/regmap.h>
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#include <linux/clk-provider.h>
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struct clk;
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struct mtk_clk_gate {
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struct clk_hw hw;
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struct regmap *regmap;
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int set_ofs;
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int clr_ofs;
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int sta_ofs;
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u8 bit;
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};
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static inline struct mtk_clk_gate *to_mtk_clk_gate(struct clk_hw *hw)
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{
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return container_of(hw, struct mtk_clk_gate, hw);
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}
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extern const struct clk_ops mtk_clk_gate_ops_setclr;
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extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
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extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
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extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
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struct clk *mtk_clk_register_gate(
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const char *name,
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const char *parent_name,
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struct regmap *regmap,
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int set_ofs,
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int clr_ofs,
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int sta_ofs,
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u8 bit,
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const struct clk_ops *ops);
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#endif /* __DRV_CLK_GATE_H */
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