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f363e21593
The composite clock assumes that any clock implementing the .recalc_rate callback will also implement .round_rate and .set_rate. This is not always true; the basic fixed-rate clock will only implement .recalc_rate and a fixed-divider clock may choose to implement .recalc_rate and .round_rate but not .set_rate. Fix this by conditionally registering .round_rate and .set_rate callbacks based on the rate_ops passed in to clk_composite_register. Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Emilio López <emilio@elopez.com.ar> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
211 lines
5.6 KiB
C
211 lines
5.6 KiB
C
/*
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* Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
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static u8 clk_composite_get_parent(struct clk_hw *hw)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *mux_ops = composite->mux_ops;
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struct clk_hw *mux_hw = composite->mux_hw;
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mux_hw->clk = hw->clk;
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return mux_ops->get_parent(mux_hw);
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}
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static int clk_composite_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *mux_ops = composite->mux_ops;
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struct clk_hw *mux_hw = composite->mux_hw;
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mux_hw->clk = hw->clk;
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return mux_ops->set_parent(mux_hw, index);
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}
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static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *rate_ops = composite->rate_ops;
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struct clk_hw *rate_hw = composite->rate_hw;
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rate_hw->clk = hw->clk;
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return rate_ops->recalc_rate(rate_hw, parent_rate);
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}
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static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *rate_ops = composite->rate_ops;
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struct clk_hw *rate_hw = composite->rate_hw;
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rate_hw->clk = hw->clk;
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return rate_ops->round_rate(rate_hw, rate, prate);
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}
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static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *rate_ops = composite->rate_ops;
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struct clk_hw *rate_hw = composite->rate_hw;
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rate_hw->clk = hw->clk;
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return rate_ops->set_rate(rate_hw, rate, parent_rate);
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}
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static int clk_composite_is_enabled(struct clk_hw *hw)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *gate_ops = composite->gate_ops;
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struct clk_hw *gate_hw = composite->gate_hw;
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gate_hw->clk = hw->clk;
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return gate_ops->is_enabled(gate_hw);
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}
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static int clk_composite_enable(struct clk_hw *hw)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *gate_ops = composite->gate_ops;
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struct clk_hw *gate_hw = composite->gate_hw;
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gate_hw->clk = hw->clk;
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return gate_ops->enable(gate_hw);
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}
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static void clk_composite_disable(struct clk_hw *hw)
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{
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struct clk_composite *composite = to_clk_composite(hw);
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const struct clk_ops *gate_ops = composite->gate_ops;
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struct clk_hw *gate_hw = composite->gate_hw;
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gate_hw->clk = hw->clk;
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gate_ops->disable(gate_hw);
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}
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struct clk *clk_register_composite(struct device *dev, const char *name,
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const char **parent_names, int num_parents,
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struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
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struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
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struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
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unsigned long flags)
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{
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struct clk *clk;
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struct clk_init_data init;
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struct clk_composite *composite;
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struct clk_ops *clk_composite_ops;
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composite = kzalloc(sizeof(*composite), GFP_KERNEL);
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if (!composite) {
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pr_err("%s: could not allocate composite clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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init.name = name;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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clk_composite_ops = &composite->ops;
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if (mux_hw && mux_ops) {
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if (!mux_ops->get_parent || !mux_ops->set_parent) {
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clk = ERR_PTR(-EINVAL);
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goto err;
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}
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composite->mux_hw = mux_hw;
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composite->mux_ops = mux_ops;
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clk_composite_ops->get_parent = clk_composite_get_parent;
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clk_composite_ops->set_parent = clk_composite_set_parent;
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}
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if (rate_hw && rate_ops) {
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if (!rate_ops->recalc_rate) {
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clk = ERR_PTR(-EINVAL);
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goto err;
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}
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/* .round_rate is a prerequisite for .set_rate */
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if (rate_ops->round_rate) {
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clk_composite_ops->round_rate = clk_composite_round_rate;
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if (rate_ops->set_rate) {
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clk_composite_ops->set_rate = clk_composite_set_rate;
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}
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} else {
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WARN(rate_ops->set_rate,
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"%s: missing round_rate op is required\n",
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__func__);
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}
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composite->rate_hw = rate_hw;
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composite->rate_ops = rate_ops;
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clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
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}
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if (gate_hw && gate_ops) {
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if (!gate_ops->is_enabled || !gate_ops->enable ||
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!gate_ops->disable) {
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clk = ERR_PTR(-EINVAL);
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goto err;
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}
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composite->gate_hw = gate_hw;
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composite->gate_ops = gate_ops;
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clk_composite_ops->is_enabled = clk_composite_is_enabled;
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clk_composite_ops->enable = clk_composite_enable;
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clk_composite_ops->disable = clk_composite_disable;
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}
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init.ops = clk_composite_ops;
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composite->hw.init = &init;
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clk = clk_register(dev, &composite->hw);
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if (IS_ERR(clk))
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goto err;
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if (composite->mux_hw)
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composite->mux_hw->clk = clk;
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if (composite->rate_hw)
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composite->rate_hw->clk = clk;
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if (composite->gate_hw)
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composite->gate_hw->clk = clk;
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return clk;
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err:
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kfree(composite);
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return clk;
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}
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