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8bf5646641
G2D clock registers are different in EXYNOS4210 and EXYNOS4X12 SoCs. Hence moving the SoC specific G2D clock entries from common clock file (clock-exynos4.c) to EXYNOS4210 specific clock file (clock-exynos4210.c). Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
36 lines
1.2 KiB
C
36 lines
1.2 KiB
C
/*
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* Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Header file for exynos4 clock support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_CLOCK_H
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#define __ASM_ARCH_CLOCK_H __FILE__
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#include <linux/clk.h>
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extern struct clksrc_clk exynos4_clk_aclk_133;
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extern struct clksrc_clk exynos4_clk_mout_mpll;
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extern struct clksrc_sources exynos4_clkset_mout_corebus;
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extern struct clksrc_sources exynos4_clkset_group;
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extern struct clk *exynos4_clkset_aclk_top_list[];
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extern struct clk *exynos4_clkset_group_list[];
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extern struct clksrc_sources exynos4_clkset_mout_g2d0;
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extern struct clksrc_sources exynos4_clkset_mout_g2d1;
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extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable);
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extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable);
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extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable);
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extern int exynos4_clk_ip_image_ctrl(struct clk *clk, int enable);
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extern int exynos4_clk_ip_dmc_ctrl(struct clk *clk, int enable);
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#endif /* __ASM_ARCH_CLOCK_H */
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