mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 20:23:57 +08:00
4ba9920e5e
Pull networking updates from David Miller: 1) BPF debugger and asm tool by Daniel Borkmann. 2) Speed up create/bind in AF_PACKET, also from Daniel Borkmann. 3) Correct reciprocal_divide and update users, from Hannes Frederic Sowa and Daniel Borkmann. 4) Currently we only have a "set" operation for the hw timestamp socket ioctl, add a "get" operation to match. From Ben Hutchings. 5) Add better trace events for debugging driver datapath problems, also from Ben Hutchings. 6) Implement auto corking in TCP, from Eric Dumazet. Basically, if we have a small send and a previous packet is already in the qdisc or device queue, defer until TX completion or we get more data. 7) Allow userspace to manage ipv6 temporary addresses, from Jiri Pirko. 8) Add a qdisc bypass option for AF_PACKET sockets, from Daniel Borkmann. 9) Share IP header compression code between Bluetooth and IEEE802154 layers, from Jukka Rissanen. 10) Fix ipv6 router reachability probing, from Jiri Benc. 11) Allow packets to be captured on macvtap devices, from Vlad Yasevich. 12) Support tunneling in GRO layer, from Jerry Chu. 13) Allow bonding to be configured fully using netlink, from Scott Feldman. 14) Allow AF_PACKET users to obtain the VLAN TPID, just like they can already get the TCI. From Atzm Watanabe. 15) New "Heavy Hitter" qdisc, from Terry Lam. 16) Significantly improve the IPSEC support in pktgen, from Fan Du. 17) Allow ipv4 tunnels to cache routes, just like sockets. From Tom Herbert. 18) Add Proportional Integral Enhanced packet scheduler, from Vijay Subramanian. 19) Allow openvswitch to mmap'd netlink, from Thomas Graf. 20) Key TCP metrics blobs also by source address, not just destination address. From Christoph Paasch. 21) Support 10G in generic phylib. From Andy Fleming. 22) Try to short-circuit GRO flow compares using device provided RX hash, if provided. From Tom Herbert. The wireless and netfilter folks have been busy little bees too. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (2064 commits) net/cxgb4: Fix referencing freed adapter ipv6: reallocate addrconf router for ipv6 address when lo device up fib_frontend: fix possible NULL pointer dereference rtnetlink: remove IFLA_BOND_SLAVE definition rtnetlink: remove check for fill_slave_info in rtnl_have_link_slave_info qlcnic: update version to 5.3.55 qlcnic: Enhance logic to calculate msix vectors. qlcnic: Refactor interrupt coalescing code for all adapters. qlcnic: Update poll controller code path qlcnic: Interrupt code cleanup qlcnic: Enhance Tx timeout debugging. qlcnic: Use bool for rx_mac_learn. bonding: fix u64 division rtnetlink: add missing IFLA_BOND_AD_INFO_UNSPEC sfc: Use the correct maximum TX DMA ring size for SFC9100 Add Shradha Shah as the sfc driver maintainer. net/vxlan: Share RX skb de-marking and checksum checks with ovs tulip: cleanup by using ARRAY_SIZE() ip_tunnel: clear IPCB in ip_tunnel_xmit() in case dst_link_failure() is called net/cxgb4: Don't retrieve stats during recovery ...
930 lines
24 KiB
C
930 lines
24 KiB
C
/*
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* Copyright (c) 2007 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/errno.h>
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#include <linux/if_ether.h>
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#include <linux/if_vlan.h>
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#include <linux/export.h>
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#include <linux/mlx4/cmd.h>
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#include "mlx4.h"
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#define MLX4_MAC_VALID (1ull << 63)
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#define MLX4_VLAN_VALID (1u << 31)
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#define MLX4_VLAN_MASK 0xfff
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#define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL
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#define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL
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#define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL
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#define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL
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void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table)
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{
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int i;
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mutex_init(&table->mutex);
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for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
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table->entries[i] = 0;
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table->refs[i] = 0;
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}
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table->max = 1 << dev->caps.log_num_macs;
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table->total = 0;
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}
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void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table)
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{
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int i;
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mutex_init(&table->mutex);
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for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) {
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table->entries[i] = 0;
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table->refs[i] = 0;
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}
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table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR;
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table->total = 0;
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}
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static int validate_index(struct mlx4_dev *dev,
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struct mlx4_mac_table *table, int index)
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{
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int err = 0;
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if (index < 0 || index >= table->max || !table->entries[index]) {
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mlx4_warn(dev, "No valid Mac entry for the given index\n");
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err = -EINVAL;
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}
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return err;
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}
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static int find_index(struct mlx4_dev *dev,
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struct mlx4_mac_table *table, u64 mac)
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{
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int i;
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for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
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if ((mac & MLX4_MAC_MASK) ==
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(MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))
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return i;
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}
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/* Mac not found */
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return -EINVAL;
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}
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static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
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__be64 *entries)
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{
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struct mlx4_cmd_mailbox *mailbox;
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u32 in_mod;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE);
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in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port;
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err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
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MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx)
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{
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struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
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struct mlx4_mac_table *table = &info->mac_table;
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int i;
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for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
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if (!table->refs[i])
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continue;
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if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
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*idx = i;
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return 0;
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}
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(mlx4_find_cached_mac);
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int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
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{
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struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
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struct mlx4_mac_table *table = &info->mac_table;
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int i, err = 0;
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int free = -1;
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mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n",
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(unsigned long long) mac, port);
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mutex_lock(&table->mutex);
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for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
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if (free < 0 && !table->entries[i]) {
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free = i;
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continue;
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}
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if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
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/* MAC already registered, increment ref count */
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err = i;
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++table->refs[i];
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goto out;
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}
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}
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mlx4_dbg(dev, "Free MAC index is %d\n", free);
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if (table->total == table->max) {
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/* No free mac entries */
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err = -ENOSPC;
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goto out;
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}
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/* Register new MAC */
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table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID);
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err = mlx4_set_port_mac_table(dev, port, table->entries);
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if (unlikely(err)) {
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mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
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(unsigned long long) mac);
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table->entries[free] = 0;
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goto out;
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}
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table->refs[free] = 1;
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err = free;
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++table->total;
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out:
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mutex_unlock(&table->mutex);
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return err;
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}
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EXPORT_SYMBOL_GPL(__mlx4_register_mac);
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int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac)
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{
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u64 out_param = 0;
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int err = -EINVAL;
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if (mlx4_is_mfunc(dev)) {
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if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) {
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err = mlx4_cmd_imm(dev, mac, &out_param,
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((u32) port) << 8 | (u32) RES_MAC,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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}
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if (err && err == -EINVAL && mlx4_is_slave(dev)) {
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/* retry using old REG_MAC format */
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set_param_l(&out_param, port);
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err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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if (!err)
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dev->flags |= MLX4_FLAG_OLD_REG_MAC;
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}
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if (err)
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return err;
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return get_param_l(&out_param);
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}
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return __mlx4_register_mac(dev, port, mac);
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}
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EXPORT_SYMBOL_GPL(mlx4_register_mac);
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int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port)
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{
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return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
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(port - 1) * (1 << dev->caps.log_num_macs);
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}
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EXPORT_SYMBOL_GPL(mlx4_get_base_qpn);
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void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
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{
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struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
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struct mlx4_mac_table *table = &info->mac_table;
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int index;
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mutex_lock(&table->mutex);
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index = find_index(dev, table, mac);
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if (validate_index(dev, table, index))
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goto out;
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if (--table->refs[index]) {
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mlx4_dbg(dev, "Have more references for index %d,"
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"no need to modify mac table\n", index);
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goto out;
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}
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table->entries[index] = 0;
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mlx4_set_port_mac_table(dev, port, table->entries);
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--table->total;
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out:
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mutex_unlock(&table->mutex);
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}
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EXPORT_SYMBOL_GPL(__mlx4_unregister_mac);
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void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
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{
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u64 out_param = 0;
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if (mlx4_is_mfunc(dev)) {
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if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) {
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(void) mlx4_cmd_imm(dev, mac, &out_param,
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((u32) port) << 8 | (u32) RES_MAC,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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} else {
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/* use old unregister mac format */
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set_param_l(&out_param, port);
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(void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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}
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return;
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}
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__mlx4_unregister_mac(dev, port, mac);
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return;
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}
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EXPORT_SYMBOL_GPL(mlx4_unregister_mac);
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int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac)
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{
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struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
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struct mlx4_mac_table *table = &info->mac_table;
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int index = qpn - info->base_qpn;
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int err = 0;
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/* CX1 doesn't support multi-functions */
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mutex_lock(&table->mutex);
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err = validate_index(dev, table, index);
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if (err)
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goto out;
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table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID);
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err = mlx4_set_port_mac_table(dev, port, table->entries);
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if (unlikely(err)) {
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mlx4_err(dev, "Failed adding MAC: 0x%llx\n",
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(unsigned long long) new_mac);
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table->entries[index] = 0;
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}
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out:
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mutex_unlock(&table->mutex);
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return err;
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}
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EXPORT_SYMBOL_GPL(__mlx4_replace_mac);
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static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port,
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__be32 *entries)
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{
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struct mlx4_cmd_mailbox *mailbox;
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u32 in_mod;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE);
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in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port;
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err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
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MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx)
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{
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struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
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int i;
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for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) {
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if (table->refs[i] &&
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(vid == (MLX4_VLAN_MASK &
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be32_to_cpu(table->entries[i])))) {
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/* VLAN already registered, increase reference count */
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*idx = i;
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return 0;
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}
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan);
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int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan,
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int *index)
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{
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struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
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int i, err = 0;
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int free = -1;
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mutex_lock(&table->mutex);
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if (table->total == table->max) {
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/* No free vlan entries */
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err = -ENOSPC;
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goto out;
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}
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for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) {
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if (free < 0 && (table->refs[i] == 0)) {
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free = i;
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continue;
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}
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if (table->refs[i] &&
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(vlan == (MLX4_VLAN_MASK &
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be32_to_cpu(table->entries[i])))) {
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/* Vlan already registered, increase references count */
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*index = i;
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++table->refs[i];
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goto out;
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}
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}
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if (free < 0) {
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err = -ENOMEM;
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goto out;
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}
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/* Register new VLAN */
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table->refs[free] = 1;
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table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID);
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err = mlx4_set_port_vlan_table(dev, port, table->entries);
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if (unlikely(err)) {
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mlx4_warn(dev, "Failed adding vlan: %u\n", vlan);
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table->refs[free] = 0;
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table->entries[free] = 0;
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goto out;
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}
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*index = free;
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++table->total;
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out:
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mutex_unlock(&table->mutex);
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return err;
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}
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int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index)
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{
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u64 out_param = 0;
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int err;
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if (vlan > 4095)
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return -EINVAL;
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if (mlx4_is_mfunc(dev)) {
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err = mlx4_cmd_imm(dev, vlan, &out_param,
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((u32) port) << 8 | (u32) RES_VLAN,
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RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES,
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MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
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if (!err)
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*index = get_param_l(&out_param);
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return err;
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}
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return __mlx4_register_vlan(dev, port, vlan, index);
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}
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EXPORT_SYMBOL_GPL(mlx4_register_vlan);
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|
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void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
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{
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struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table;
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int index;
|
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|
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mutex_lock(&table->mutex);
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if (mlx4_find_cached_vlan(dev, port, vlan, &index)) {
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mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan);
|
|
goto out;
|
|
}
|
|
|
|
if (index < MLX4_VLAN_REGULAR) {
|
|
mlx4_warn(dev, "Trying to free special vlan index %d\n", index);
|
|
goto out;
|
|
}
|
|
|
|
if (--table->refs[index]) {
|
|
mlx4_dbg(dev, "Have %d more references for index %d,"
|
|
"no need to modify vlan table\n", table->refs[index],
|
|
index);
|
|
goto out;
|
|
}
|
|
table->entries[index] = 0;
|
|
mlx4_set_port_vlan_table(dev, port, table->entries);
|
|
--table->total;
|
|
out:
|
|
mutex_unlock(&table->mutex);
|
|
}
|
|
|
|
void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan)
|
|
{
|
|
u64 out_param = 0;
|
|
|
|
if (mlx4_is_mfunc(dev)) {
|
|
(void) mlx4_cmd_imm(dev, vlan, &out_param,
|
|
((u32) port) << 8 | (u32) RES_VLAN,
|
|
RES_OP_RESERVE_AND_MAP,
|
|
MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
|
|
MLX4_CMD_WRAPPED);
|
|
return;
|
|
}
|
|
__mlx4_unregister_vlan(dev, port, vlan);
|
|
}
|
|
EXPORT_SYMBOL_GPL(mlx4_unregister_vlan);
|
|
|
|
int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps)
|
|
{
|
|
struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
|
|
u8 *inbuf, *outbuf;
|
|
int err;
|
|
|
|
inmailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(inmailbox))
|
|
return PTR_ERR(inmailbox);
|
|
|
|
outmailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(outmailbox)) {
|
|
mlx4_free_cmd_mailbox(dev, inmailbox);
|
|
return PTR_ERR(outmailbox);
|
|
}
|
|
|
|
inbuf = inmailbox->buf;
|
|
outbuf = outmailbox->buf;
|
|
inbuf[0] = 1;
|
|
inbuf[1] = 1;
|
|
inbuf[2] = 1;
|
|
inbuf[3] = 1;
|
|
*(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015);
|
|
*(__be32 *) (&inbuf[20]) = cpu_to_be32(port);
|
|
|
|
err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3,
|
|
MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
|
|
MLX4_CMD_NATIVE);
|
|
if (!err)
|
|
*caps = *(__be32 *) (outbuf + 84);
|
|
mlx4_free_cmd_mailbox(dev, inmailbox);
|
|
mlx4_free_cmd_mailbox(dev, outmailbox);
|
|
return err;
|
|
}
|
|
|
|
static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod,
|
|
u8 op_mod, struct mlx4_cmd_mailbox *inbox)
|
|
{
|
|
struct mlx4_priv *priv = mlx4_priv(dev);
|
|
struct mlx4_port_info *port_info;
|
|
struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master;
|
|
struct mlx4_slave_state *slave_st = &master->slave_state[slave];
|
|
struct mlx4_set_port_rqp_calc_context *qpn_context;
|
|
struct mlx4_set_port_general_context *gen_context;
|
|
int reset_qkey_viols;
|
|
int port;
|
|
int is_eth;
|
|
u32 in_modifier;
|
|
u32 promisc;
|
|
u16 mtu, prev_mtu;
|
|
int err;
|
|
int i;
|
|
__be32 agg_cap_mask;
|
|
__be32 slave_cap_mask;
|
|
__be32 new_cap_mask;
|
|
|
|
port = in_mod & 0xff;
|
|
in_modifier = in_mod >> 8;
|
|
is_eth = op_mod;
|
|
port_info = &priv->port[port];
|
|
|
|
/* Slaves cannot perform SET_PORT operations except changing MTU */
|
|
if (is_eth) {
|
|
if (slave != dev->caps.function &&
|
|
in_modifier != MLX4_SET_PORT_GENERAL) {
|
|
mlx4_warn(dev, "denying SET_PORT for slave:%d\n",
|
|
slave);
|
|
return -EINVAL;
|
|
}
|
|
switch (in_modifier) {
|
|
case MLX4_SET_PORT_RQP_CALC:
|
|
qpn_context = inbox->buf;
|
|
qpn_context->base_qpn =
|
|
cpu_to_be32(port_info->base_qpn);
|
|
qpn_context->n_mac = 0x7;
|
|
promisc = be32_to_cpu(qpn_context->promisc) >>
|
|
SET_PORT_PROMISC_SHIFT;
|
|
qpn_context->promisc = cpu_to_be32(
|
|
promisc << SET_PORT_PROMISC_SHIFT |
|
|
port_info->base_qpn);
|
|
promisc = be32_to_cpu(qpn_context->mcast) >>
|
|
SET_PORT_MC_PROMISC_SHIFT;
|
|
qpn_context->mcast = cpu_to_be32(
|
|
promisc << SET_PORT_MC_PROMISC_SHIFT |
|
|
port_info->base_qpn);
|
|
break;
|
|
case MLX4_SET_PORT_GENERAL:
|
|
gen_context = inbox->buf;
|
|
/* Mtu is configured as the max MTU among all the
|
|
* the functions on the port. */
|
|
mtu = be16_to_cpu(gen_context->mtu);
|
|
mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] +
|
|
ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN);
|
|
prev_mtu = slave_st->mtu[port];
|
|
slave_st->mtu[port] = mtu;
|
|
if (mtu > master->max_mtu[port])
|
|
master->max_mtu[port] = mtu;
|
|
if (mtu < prev_mtu && prev_mtu ==
|
|
master->max_mtu[port]) {
|
|
slave_st->mtu[port] = mtu;
|
|
master->max_mtu[port] = mtu;
|
|
for (i = 0; i < dev->num_slaves; i++) {
|
|
master->max_mtu[port] =
|
|
max(master->max_mtu[port],
|
|
master->slave_state[i].mtu[port]);
|
|
}
|
|
}
|
|
|
|
gen_context->mtu = cpu_to_be16(master->max_mtu[port]);
|
|
break;
|
|
}
|
|
return mlx4_cmd(dev, inbox->dma, in_mod, op_mod,
|
|
MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
|
|
MLX4_CMD_NATIVE);
|
|
}
|
|
|
|
/* For IB, we only consider:
|
|
* - The capability mask, which is set to the aggregate of all
|
|
* slave function capabilities
|
|
* - The QKey violatin counter - reset according to each request.
|
|
*/
|
|
|
|
if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
|
|
reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40;
|
|
new_cap_mask = ((__be32 *) inbox->buf)[2];
|
|
} else {
|
|
reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1;
|
|
new_cap_mask = ((__be32 *) inbox->buf)[1];
|
|
}
|
|
|
|
/* slave may not set the IS_SM capability for the port */
|
|
if (slave != mlx4_master_func_num(dev) &&
|
|
(be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM))
|
|
return -EINVAL;
|
|
|
|
/* No DEV_MGMT in multifunc mode */
|
|
if (mlx4_is_mfunc(dev) &&
|
|
(be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP))
|
|
return -EINVAL;
|
|
|
|
agg_cap_mask = 0;
|
|
slave_cap_mask =
|
|
priv->mfunc.master.slave_state[slave].ib_cap_mask[port];
|
|
priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask;
|
|
for (i = 0; i < dev->num_slaves; i++)
|
|
agg_cap_mask |=
|
|
priv->mfunc.master.slave_state[i].ib_cap_mask[port];
|
|
|
|
/* only clear mailbox for guests. Master may be setting
|
|
* MTU or PKEY table size
|
|
*/
|
|
if (slave != dev->caps.function)
|
|
memset(inbox->buf, 0, 256);
|
|
if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
|
|
*(u8 *) inbox->buf |= !!reset_qkey_viols << 6;
|
|
((__be32 *) inbox->buf)[2] = agg_cap_mask;
|
|
} else {
|
|
((u8 *) inbox->buf)[3] |= !!reset_qkey_viols;
|
|
((__be32 *) inbox->buf)[1] = agg_cap_mask;
|
|
}
|
|
|
|
err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
|
|
if (err)
|
|
priv->mfunc.master.slave_state[slave].ib_cap_mask[port] =
|
|
slave_cap_mask;
|
|
return err;
|
|
}
|
|
|
|
int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
|
|
struct mlx4_vhcr *vhcr,
|
|
struct mlx4_cmd_mailbox *inbox,
|
|
struct mlx4_cmd_mailbox *outbox,
|
|
struct mlx4_cmd_info *cmd)
|
|
{
|
|
return mlx4_common_set_port(dev, slave, vhcr->in_modifier,
|
|
vhcr->op_modifier, inbox);
|
|
}
|
|
|
|
/* bit locations for set port command with zero op modifier */
|
|
enum {
|
|
MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */
|
|
MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */
|
|
MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20,
|
|
MLX4_CHANGE_PORT_VL_CAP = 21,
|
|
MLX4_CHANGE_PORT_MTU_CAP = 22,
|
|
};
|
|
|
|
int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
|
|
{
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
int err, vl_cap, pkey_tbl_flag = 0;
|
|
|
|
if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
|
|
return 0;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
|
|
((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
|
|
|
|
if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
|
|
pkey_tbl_flag = 1;
|
|
((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz);
|
|
}
|
|
|
|
/* IB VL CAP enum isn't used by the firmware, just numerical values */
|
|
for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) {
|
|
((__be32 *) mailbox->buf)[0] = cpu_to_be32(
|
|
(1 << MLX4_CHANGE_PORT_MTU_CAP) |
|
|
(1 << MLX4_CHANGE_PORT_VL_CAP) |
|
|
(pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) |
|
|
(dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
|
|
(vl_cap << MLX4_SET_PORT_VL_CAP));
|
|
err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
|
|
if (err != -ENOMEM)
|
|
break;
|
|
}
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
|
|
int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
|
|
u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx)
|
|
{
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
struct mlx4_set_port_general_context *context;
|
|
int err;
|
|
u32 in_mod;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
context = mailbox->buf;
|
|
context->flags = SET_PORT_GEN_ALL_VALID;
|
|
context->mtu = cpu_to_be16(mtu);
|
|
context->pptx = (pptx * (!pfctx)) << 7;
|
|
context->pfctx = pfctx;
|
|
context->pprx = (pprx * (!pfcrx)) << 7;
|
|
context->pfcrx = pfcrx;
|
|
|
|
in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
|
|
err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_PORT_general);
|
|
|
|
int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
|
|
u8 promisc)
|
|
{
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
struct mlx4_set_port_rqp_calc_context *context;
|
|
int err;
|
|
u32 in_mod;
|
|
u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ?
|
|
MCAST_DIRECT : MCAST_DEFAULT;
|
|
|
|
if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
|
|
return 0;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
context = mailbox->buf;
|
|
context->base_qpn = cpu_to_be32(base_qpn);
|
|
context->n_mac = dev->caps.log_num_macs;
|
|
context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT |
|
|
base_qpn);
|
|
context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT |
|
|
base_qpn);
|
|
context->intra_no_vlan = 0;
|
|
context->no_vlan = MLX4_NO_VLAN_IDX;
|
|
context->intra_vlan_miss = 0;
|
|
context->vlan_miss = MLX4_VLAN_MISS_IDX;
|
|
|
|
in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port;
|
|
err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc);
|
|
|
|
int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc)
|
|
{
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
struct mlx4_set_port_prio2tc_context *context;
|
|
int err;
|
|
u32 in_mod;
|
|
int i;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
context = mailbox->buf;
|
|
for (i = 0; i < MLX4_NUM_UP; i += 2)
|
|
context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1];
|
|
|
|
in_mod = MLX4_SET_PORT_PRIO2TC << 8 | port;
|
|
err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_PORT_PRIO2TC);
|
|
|
|
int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
|
|
u8 *pg, u16 *ratelimit)
|
|
{
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
struct mlx4_set_port_scheduler_context *context;
|
|
int err;
|
|
u32 in_mod;
|
|
int i;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
context = mailbox->buf;
|
|
|
|
for (i = 0; i < MLX4_NUM_TC; i++) {
|
|
struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
|
|
u16 r = ratelimit && ratelimit[i] ? ratelimit[i] :
|
|
MLX4_RATELIMIT_DEFAULT;
|
|
|
|
tc->pg = htons(pg[i]);
|
|
tc->bw_precentage = htons(tc_tx_bw[i]);
|
|
|
|
tc->max_bw_units = htons(MLX4_RATELIMIT_UNITS);
|
|
tc->max_bw_value = htons(r);
|
|
}
|
|
|
|
in_mod = MLX4_SET_PORT_SCHEDULER << 8 | port;
|
|
err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_PORT_SCHEDULER);
|
|
|
|
enum {
|
|
VXLAN_ENABLE_MODIFY = 1 << 7,
|
|
VXLAN_STEERING_MODIFY = 1 << 6,
|
|
|
|
VXLAN_ENABLE = 1 << 7,
|
|
};
|
|
|
|
struct mlx4_set_port_vxlan_context {
|
|
u32 reserved1;
|
|
u8 modify_flags;
|
|
u8 reserved2;
|
|
u8 enable_flags;
|
|
u8 steering;
|
|
};
|
|
|
|
int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering)
|
|
{
|
|
int err;
|
|
u32 in_mod;
|
|
struct mlx4_cmd_mailbox *mailbox;
|
|
struct mlx4_set_port_vxlan_context *context;
|
|
|
|
mailbox = mlx4_alloc_cmd_mailbox(dev);
|
|
if (IS_ERR(mailbox))
|
|
return PTR_ERR(mailbox);
|
|
context = mailbox->buf;
|
|
memset(context, 0, sizeof(*context));
|
|
|
|
context->modify_flags = VXLAN_ENABLE_MODIFY | VXLAN_STEERING_MODIFY;
|
|
context->enable_flags = VXLAN_ENABLE;
|
|
context->steering = steering;
|
|
|
|
in_mod = MLX4_SET_PORT_VXLAN << 8 | port;
|
|
err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT,
|
|
MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
|
|
|
|
mlx4_free_cmd_mailbox(dev, mailbox);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_PORT_VXLAN);
|
|
|
|
int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave,
|
|
struct mlx4_vhcr *vhcr,
|
|
struct mlx4_cmd_mailbox *inbox,
|
|
struct mlx4_cmd_mailbox *outbox,
|
|
struct mlx4_cmd_info *cmd)
|
|
{
|
|
int err = 0;
|
|
|
|
return err;
|
|
}
|
|
|
|
int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port,
|
|
u64 mac, u64 clear, u8 mode)
|
|
{
|
|
return mlx4_cmd(dev, (mac | (clear << 63)), port, mode,
|
|
MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B,
|
|
MLX4_CMD_WRAPPED);
|
|
}
|
|
EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR);
|
|
|
|
int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave,
|
|
struct mlx4_vhcr *vhcr,
|
|
struct mlx4_cmd_mailbox *inbox,
|
|
struct mlx4_cmd_mailbox *outbox,
|
|
struct mlx4_cmd_info *cmd)
|
|
{
|
|
int err = 0;
|
|
|
|
return err;
|
|
}
|
|
|
|
int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave,
|
|
u32 in_mod, struct mlx4_cmd_mailbox *outbox)
|
|
{
|
|
return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0,
|
|
MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
|
|
MLX4_CMD_NATIVE);
|
|
}
|
|
|
|
int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave,
|
|
struct mlx4_vhcr *vhcr,
|
|
struct mlx4_cmd_mailbox *inbox,
|
|
struct mlx4_cmd_mailbox *outbox,
|
|
struct mlx4_cmd_info *cmd)
|
|
{
|
|
if (slave != dev->caps.function)
|
|
return 0;
|
|
return mlx4_common_dump_eth_stats(dev, slave,
|
|
vhcr->in_modifier, outbox);
|
|
}
|
|
|
|
void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap)
|
|
{
|
|
if (!mlx4_is_mfunc(dev)) {
|
|
*stats_bitmap = 0;
|
|
return;
|
|
}
|
|
|
|
*stats_bitmap = (MLX4_STATS_TRAFFIC_COUNTERS_MASK |
|
|
MLX4_STATS_TRAFFIC_DROPS_MASK |
|
|
MLX4_STATS_PORT_COUNTERS_MASK);
|
|
|
|
if (mlx4_is_master(dev))
|
|
*stats_bitmap |= MLX4_STATS_ERROR_COUNTERS_MASK;
|
|
}
|
|
EXPORT_SYMBOL(mlx4_set_stats_bitmap);
|