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e126ba97db
The driver is comprised of two kernel modules: mlx5_ib and mlx5_core. This partitioning resembles what we have for mlx4, except that mlx5_ib is the pci device driver and not mlx5_core. mlx5_core is essentially a library that provides general functionality that is intended to be used by other Mellanox devices that will be introduced in the future. mlx5_ib has a similar role as any hardware device under drivers/infiniband/hw. Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> [ Merge in coccinelle fixes from Fengguang Wu <fengguang.wu@intel.com>. - Roland ] Signed-off-by: Roland Dreier <roland@purestorage.com>
80 lines
2.6 KiB
C
80 lines
2.6 KiB
C
/*
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* Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX5_DOORBELL_H
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#define MLX5_DOORBELL_H
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#define MLX5_BF_OFFSET 0x800
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#define MLX5_CQ_DOORBELL 0x20
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#if BITS_PER_LONG == 64
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/* Assume that we can just write a 64-bit doorbell atomically. s390
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* actually doesn't have writeq() but S/390 systems don't even have
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* PCI so we won't worry about it.
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*/
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#define MLX5_DECLARE_DOORBELL_LOCK(name)
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#define MLX5_INIT_DOORBELL_LOCK(ptr) do { } while (0)
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#define MLX5_GET_DOORBELL_LOCK(ptr) (NULL)
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static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
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spinlock_t *doorbell_lock)
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{
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__raw_writeq(*(u64 *)val, dest);
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}
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#else
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/* Just fall back to a spinlock to protect the doorbell if
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* BITS_PER_LONG is 32 -- there's no portable way to do atomic 64-bit
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* MMIO writes.
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*/
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#define MLX5_DECLARE_DOORBELL_LOCK(name) spinlock_t name;
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#define MLX5_INIT_DOORBELL_LOCK(ptr) spin_lock_init(ptr)
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#define MLX5_GET_DOORBELL_LOCK(ptr) (ptr)
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static inline void mlx5_write64(__be32 val[2], void __iomem *dest,
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spinlock_t *doorbell_lock)
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{
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unsigned long flags;
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spin_lock_irqsave(doorbell_lock, flags);
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__raw_writel((__force u32) val[0], dest);
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__raw_writel((__force u32) val[1], dest + 4);
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spin_unlock_irqrestore(doorbell_lock, flags);
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}
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#endif
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#endif /* MLX5_DOORBELL_H */
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