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linux-next/drivers/clk/meson
Jerome Brunet 59e85335dd clk: meson: add audio clock divider support
The audio divider needs a specific clock divider driver.
With am mpll parent clock, which is able to provide a fairly precise rate,
the generic divider tends to select low value of the divider. In such case
the quality of the clock is very poor. For the same final rate, maximizing
the audio clock divider value and selecting the corresponding mpll rate
gives better results. This is what this driver aims to acheive. So far, so
good.

Cc: Hendrik v. Raven <hendrik@consetetur.de>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-04-07 16:50:44 +02:00
..
clk-audio-divider.c clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
clk-cpu.c clk: meson8b: clean up cpu clocks 2016-06-22 18:02:35 -07:00
clk-mpll.c clk: meson: mpll: correct N2 maximum value 2017-03-27 12:30:38 -07:00
clk-pll.c clk: meson: Add support for parameters for specific PLLs 2017-04-04 12:05:12 -07:00
clkc.h clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
gxbb-aoclk.c clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe() 2016-08-24 00:55:13 -07:00
gxbb.c clk: meson: gxbb: protect against holes in the onecell_data array 2017-04-07 16:50:44 +02:00
gxbb.h Merge branch 'v4.12/clk-drivers' into v4.12/clk 2017-04-04 15:58:11 -07:00
Kconfig clk: gxbb: add AmLogic GXBB clk controller driver 2016-06-22 18:07:31 -07:00
Makefile clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
meson8b.c clk: meson8b: add the mplls clocks 0, 1 and 2 2017-03-27 12:30:27 -07:00
meson8b.h clk: meson8b: add the mplls clocks 0, 1 and 2 2017-03-27 12:30:27 -07:00