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0d9179fb33
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have the proper "clocks" property in their UART controllers node, it is no longer useful to have the clock-frequency property defined in the board-level Device Tree files. Therefore, this commit gets rid of all the useless 'clock-frequency' properties. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
177 lines
3.5 KiB
Plaintext
177 lines
3.5 KiB
Plaintext
/*
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* Device Tree file for Marvell Armada 370 evaluation board
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* (DB-88F6710-BP-DDR3)
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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#include "armada-370.dtsi"
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/ {
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model = "Marvell Armada 370 Evaluation Board";
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compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x40000000>; /* 1 GB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
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MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
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internal-regs {
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serial@12000 {
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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ethernet@70000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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ethernet@74000 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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i2c@11000 {
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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status = "okay";
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audio_codec: audio-codec@4a {
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compatible = "cirrus,cs42l51";
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reg = <0x4a>;
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};
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};
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audio-controller@30000 {
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pinctrl-0 = <&i2s_pins2>;
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pinctrl-names = "default";
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status = "okay";
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};
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mvsdio@d4000 {
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pinctrl-0 = <&sdio_pins1>;
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pinctrl-names = "default";
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/*
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* This device is disabled by default, because
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* using the SD card connector requires
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* changing the default CON40 connector
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* "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
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* different connector
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* "DB-88F6710_MPP_RGMII_SD_Jumper".
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*/
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status = "disabled";
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/* No CD or WP GPIOs */
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broken-cd;
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};
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pinctrl {
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/*
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* These pins might be muxed as I2S by
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* the bootloader, but it conflicts
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* with the real I2S pins that are
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* muxed using i2s_pins. We must mux
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* those pins to a function other than
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* I2S.
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*/
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pinctrl-0 = <&hog_pins1 &hog_pins2>;
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pinctrl-names = "default";
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hog_pins1: hog-pins1 {
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marvell,pins = "mpp6", "mpp8", "mpp10",
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"mpp12", "mpp13";
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marvell,function = "gpio";
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};
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hog_pins2: hog-pins2 {
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marvell,pins = "mpp5", "mpp7", "mpp9";
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marvell,function = "gpo";
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};
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};
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usb@50000 {
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status = "okay";
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};
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usb@51000 {
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status = "okay";
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};
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spi0: spi@10600 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mx25l25635e";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <50000000>;
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};
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};
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};
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pcie-controller {
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status = "okay";
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/*
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* The two PCIe units are accessible through
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* both standard PCIe slots and mini-PCIe
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* slots on the board.
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*/
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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};
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sound {
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compatible = "marvell,a370db-audio";
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marvell,audio-controller = <&audio_controller>;
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marvell,audio-codec = <&audio_codec &spdif_out &spdif_in>;
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status = "okay";
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};
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spdif_out: spdif-out {
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compatible = "linux,spdif-dit";
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};
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spdif_in: spdif-in {
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compatible = "linux,spdif-dir";
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};
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};
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