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This adds a new driver for the USB3 PHY found on Meson GXL and GXM SoCs (both SoCs are using the same USB PHY register layout). Unfortunately there is no documentation for this PHY in the public S905X datasheet (published for example by Khadas). What we know so far about this PHY: - even though the Meson GXL and GXM SoCs do not expose an USB3 port (the dwc3 controller only has USB2 ports enabled) we need to initialize the USB3 PHY (specifically USB_R1_U3H_FLADJ_30MHZ_REG_MASK). Without this initialization high-speed USB devices (especially USB hard disks and thumb drives, slower devices like mice do not seem to be affected) - on some boards the USB3 PHY starts in "device mode" - we want to bring it into a known state (by switching it to host mode for now). - it is responsible for the OTG detection and for switching the first USB2 PHY between host and peripheral (aka device) mode. an interrupt can be used to detect changes between host and device mode. There are five inputs to this register area: - the clock and reset line for the USB3 PHY itself - the clock and reset line for the peripheral mode and OTG detection logic (on the GXL and GXM SoCs these are the same clock and reset line as for the USB3 PHY itself, but Amlogic sees this as two different components - even though they share the same register space - so they have to be passed individually to allow specifying different inputs on other SoCs if needed) - the interrupt for the OTG detection logic The whole OTG detection logic is not implemented yet. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
39 lines
1017 B
Plaintext
39 lines
1017 B
Plaintext
#
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# Phy drivers for Amlogic platforms
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#
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config PHY_MESON8B_USB2
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tristate "Meson8, Meson8b and GXBB USB2 PHY driver"
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default ARCH_MESON
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depends on OF && (ARCH_MESON || COMPILE_TEST)
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depends on USB_SUPPORT
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select USB_COMMON
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select GENERIC_PHY
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help
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Enable this to support the Meson USB2 PHYs found in Meson8,
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Meson8b and GXBB SoCs.
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If unsure, say N.
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config PHY_MESON_GXL_USB2
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tristate "Meson GXL and GXM USB2 PHY drivers"
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default ARCH_MESON
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depends on OF && (ARCH_MESON || COMPILE_TEST)
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depends on USB_SUPPORT
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to support the Meson USB2 PHYs found in Meson
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GXL and GXM SoCs.
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If unsure, say N.
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config PHY_MESON_GXL_USB3
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tristate "Meson GXL and GXM USB3 PHY drivers"
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default ARCH_MESON
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depends on OF && (ARCH_MESON || COMPILE_TEST)
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depends on USB_SUPPORT
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select GENERIC_PHY
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select REGMAP_MMIO
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help
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Enable this to support the Meson USB3 PHY and OTG detection
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IP block found in Meson GXL and GXM SoCs.
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If unsure, say N.
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