mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-24 05:04:00 +08:00
1e02ce4ccc
Context switches and TLB flushes can change individual bits of CR4. CR4 reads take several cycles, so store a shadow copy of CR4 in a per-cpu variable. To avoid wasting a cache line, I added the CR4 shadow to cpu_tlbstate, which is already touched in switch_mm. The heaviest users of the cr4 shadow will be switch_mm and __switch_to_xtra, and __switch_to_xtra is called shortly after switch_mm during context switch, so the cacheline is likely to be hot. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Kees Cook <keescook@chromium.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Vince Weaver <vince@deater.net> Cc: "hillf.zj" <hillf.zj@alibaba-inc.com> Cc: Valdis Kletnieks <Valdis.Kletnieks@vt.edu> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
133 lines
2.7 KiB
C
133 lines
2.7 KiB
C
/* CPU virtualization extensions handling
|
|
*
|
|
* This should carry the code for handling CPU virtualization extensions
|
|
* that needs to live in the kernel core.
|
|
*
|
|
* Author: Eduardo Habkost <ehabkost@redhat.com>
|
|
*
|
|
* Copyright (C) 2008, Red Hat Inc.
|
|
*
|
|
* Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
|
|
*
|
|
* This work is licensed under the terms of the GNU GPL, version 2. See
|
|
* the COPYING file in the top-level directory.
|
|
*/
|
|
#ifndef _ASM_X86_VIRTEX_H
|
|
#define _ASM_X86_VIRTEX_H
|
|
|
|
#include <asm/processor.h>
|
|
|
|
#include <asm/vmx.h>
|
|
#include <asm/svm.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
/*
|
|
* VMX functions:
|
|
*/
|
|
|
|
static inline int cpu_has_vmx(void)
|
|
{
|
|
unsigned long ecx = cpuid_ecx(1);
|
|
return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
|
|
}
|
|
|
|
|
|
/** Disable VMX on the current CPU
|
|
*
|
|
* vmxoff causes a undefined-opcode exception if vmxon was not run
|
|
* on the CPU previously. Only call this function if you know VMX
|
|
* is enabled.
|
|
*/
|
|
static inline void cpu_vmxoff(void)
|
|
{
|
|
asm volatile (ASM_VMX_VMXOFF : : : "cc");
|
|
cr4_clear_bits(X86_CR4_VMXE);
|
|
}
|
|
|
|
static inline int cpu_vmx_enabled(void)
|
|
{
|
|
return __read_cr4() & X86_CR4_VMXE;
|
|
}
|
|
|
|
/** Disable VMX if it is enabled on the current CPU
|
|
*
|
|
* You shouldn't call this if cpu_has_vmx() returns 0.
|
|
*/
|
|
static inline void __cpu_emergency_vmxoff(void)
|
|
{
|
|
if (cpu_vmx_enabled())
|
|
cpu_vmxoff();
|
|
}
|
|
|
|
/** Disable VMX if it is supported and enabled on the current CPU
|
|
*/
|
|
static inline void cpu_emergency_vmxoff(void)
|
|
{
|
|
if (cpu_has_vmx())
|
|
__cpu_emergency_vmxoff();
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
* SVM functions:
|
|
*/
|
|
|
|
/** Check if the CPU has SVM support
|
|
*
|
|
* You can use the 'msg' arg to get a message describing the problem,
|
|
* if the function returns zero. Simply pass NULL if you are not interested
|
|
* on the messages; gcc should take care of not generating code for
|
|
* the messages on this case.
|
|
*/
|
|
static inline int cpu_has_svm(const char **msg)
|
|
{
|
|
uint32_t eax, ebx, ecx, edx;
|
|
|
|
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
|
|
if (msg)
|
|
*msg = "not amd";
|
|
return 0;
|
|
}
|
|
|
|
cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
|
|
if (eax < SVM_CPUID_FUNC) {
|
|
if (msg)
|
|
*msg = "can't execute cpuid_8000000a";
|
|
return 0;
|
|
}
|
|
|
|
cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
|
|
if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
|
|
if (msg)
|
|
*msg = "svm not available";
|
|
return 0;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
|
|
/** Disable SVM on the current CPU
|
|
*
|
|
* You should call this only if cpu_has_svm() returned true.
|
|
*/
|
|
static inline void cpu_svm_disable(void)
|
|
{
|
|
uint64_t efer;
|
|
|
|
wrmsrl(MSR_VM_HSAVE_PA, 0);
|
|
rdmsrl(MSR_EFER, efer);
|
|
wrmsrl(MSR_EFER, efer & ~EFER_SVME);
|
|
}
|
|
|
|
/** Makes sure SVM is disabled, if it is supported on the CPU
|
|
*/
|
|
static inline void cpu_emergency_svm_disable(void)
|
|
{
|
|
if (cpu_has_svm(NULL))
|
|
cpu_svm_disable();
|
|
}
|
|
|
|
#endif /* _ASM_X86_VIRTEX_H */
|