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3f9eaf0984
This patch adds a secure API to read AuxCoreBoot0 register to check the cpu boot status. It also moves the other smc APIs to common omap44xx-smc.S. This APIs should not be marked as __INIT because we need these to be present for CPU hotplug Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
58 lines
1.3 KiB
ArmAsm
58 lines
1.3 KiB
ArmAsm
/*
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* OMAP44xx secure APIs file.
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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*
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* This program is free software,you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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/*
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* This is common routine to manage secure monitor API
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* used to modify the PL310 secure registers.
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* 'r0' contains the value to be modified and 'r12' contains
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* the monitor API number. It uses few CPU registers
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* internally and hence they need be backed up including
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* link register "lr".
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* Function signature : void omap_smc1(u32 fn, u32 arg)
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*/
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ENTRY(omap_smc1)
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stmfd sp!, {r2-r12, lr}
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mov r12, r0
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mov r0, r1
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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END(omap_smc1)
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ENTRY(omap_modify_auxcoreboot0)
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stmfd sp!, {r1-r12, lr}
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ldr r12, =0x104
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dsb
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smc #0
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ldmfd sp!, {r1-r12, pc}
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END(omap_modify_auxcoreboot0)
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ENTRY(omap_auxcoreboot_addr)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x105
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dsb
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smc #0
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ldmfd sp!, {r2-r12, pc}
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END(omap_auxcoreboot_addr)
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ENTRY(omap_read_auxcoreboot0)
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stmfd sp!, {r2-r12, lr}
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ldr r12, =0x103
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dsb
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smc #0
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mov r0, r0, lsr #9
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ldmfd sp!, {r2-r12, pc}
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END(omap_read_auxcoreboot0)
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