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881994638c
The inclusion of mach/hardware.h is not used by the driver at all. Remove it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: linux-watchdog@vger.kernel.org
362 lines
9.3 KiB
C
362 lines
9.3 KiB
C
/*
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* Watchdog driver for IMX2 and later processors
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*
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* Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
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*
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* some parts adapted by similar drivers from Darius Augulis and Vladimir
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* Zapolskiy, additional improvements by Wim Van Sebroeck.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* NOTE: MX1 has a slightly different Watchdog than MX2 and later:
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*
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* MX1: MX2+:
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* ---- -----
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* Registers: 32-bit 16-bit
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* Stopable timer: Yes No
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* Need to enable clk: No Yes
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* Halt on suspend: Manual Can be automatic
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#include <linux/clk.h>
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#include <linux/fs.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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#include <linux/timer.h>
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#include <linux/jiffies.h>
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#define DRIVER_NAME "imx2-wdt"
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#define IMX2_WDT_WCR 0x00 /* Control Register */
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#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
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#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
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#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
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#define IMX2_WDT_WSR 0x02 /* Service Register */
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#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
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#define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
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#define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
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#define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
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#define IMX2_WDT_MAX_TIME 128
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#define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
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#define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
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#define IMX2_WDT_STATUS_OPEN 0
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#define IMX2_WDT_STATUS_STARTED 1
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#define IMX2_WDT_EXPECT_CLOSE 2
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static struct {
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struct clk *clk;
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void __iomem *base;
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unsigned timeout;
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unsigned long status;
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struct timer_list timer; /* Pings the watchdog when closed */
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} imx2_wdt;
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static struct miscdevice imx2_wdt_miscdev;
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
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module_param(timeout, uint, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
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__MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
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static const struct watchdog_info imx2_wdt_info = {
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.identity = "imx2+ watchdog",
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.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
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};
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static inline void imx2_wdt_setup(void)
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{
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u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
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/* Strip the old watchdog Time-Out value */
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val &= ~IMX2_WDT_WCR_WT;
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/* Generate reset if WDOG times out */
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val &= ~IMX2_WDT_WCR_WRE;
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/* Keep Watchdog Disabled */
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val &= ~IMX2_WDT_WCR_WDE;
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/* Set the watchdog's Time-Out value */
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val |= WDOG_SEC_TO_COUNT(imx2_wdt.timeout);
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__raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
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/* enable the watchdog */
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val |= IMX2_WDT_WCR_WDE;
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__raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
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}
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static inline void imx2_wdt_ping(void)
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{
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__raw_writew(IMX2_WDT_SEQ1, imx2_wdt.base + IMX2_WDT_WSR);
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__raw_writew(IMX2_WDT_SEQ2, imx2_wdt.base + IMX2_WDT_WSR);
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}
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static void imx2_wdt_timer_ping(unsigned long arg)
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{
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/* ping it every imx2_wdt.timeout / 2 seconds to prevent reboot */
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imx2_wdt_ping();
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mod_timer(&imx2_wdt.timer, jiffies + imx2_wdt.timeout * HZ / 2);
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}
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static void imx2_wdt_start(void)
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{
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if (!test_and_set_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
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/* at our first start we enable clock and do initialisations */
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clk_prepare_enable(imx2_wdt.clk);
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imx2_wdt_setup();
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} else /* delete the timer that pings the watchdog after close */
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del_timer_sync(&imx2_wdt.timer);
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/* Watchdog is enabled - time to reload the timeout value */
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imx2_wdt_ping();
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}
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static void imx2_wdt_stop(void)
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{
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/* we don't need a clk_disable, it cannot be disabled once started.
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* We use a timer to ping the watchdog while /dev/watchdog is closed */
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imx2_wdt_timer_ping(0);
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}
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static void imx2_wdt_set_timeout(int new_timeout)
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{
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u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
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/* set the new timeout value in the WSR */
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val &= ~IMX2_WDT_WCR_WT;
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val |= WDOG_SEC_TO_COUNT(new_timeout);
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__raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR);
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}
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static int imx2_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status))
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return -EBUSY;
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imx2_wdt_start();
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return nonseekable_open(inode, file);
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}
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static int imx2_wdt_close(struct inode *inode, struct file *file)
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{
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if (test_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status) && !nowayout)
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imx2_wdt_stop();
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else {
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dev_crit(imx2_wdt_miscdev.parent,
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"Unexpected close: Expect reboot!\n");
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imx2_wdt_ping();
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}
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clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
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clear_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status);
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return 0;
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}
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static long imx2_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int new_value;
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u16 val;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &imx2_wdt_info,
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sizeof(struct watchdog_info)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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return put_user(0, p);
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case WDIOC_GETBOOTSTATUS:
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val = __raw_readw(imx2_wdt.base + IMX2_WDT_WRSR);
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new_value = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
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return put_user(new_value, p);
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case WDIOC_KEEPALIVE:
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imx2_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_value, p))
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return -EFAULT;
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if ((new_value < 1) || (new_value > IMX2_WDT_MAX_TIME))
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return -EINVAL;
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imx2_wdt_set_timeout(new_value);
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imx2_wdt.timeout = new_value;
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imx2_wdt_ping();
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/* Fallthrough to return current value */
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case WDIOC_GETTIMEOUT:
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return put_user(imx2_wdt.timeout, p);
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default:
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return -ENOTTY;
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}
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}
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static ssize_t imx2_wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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size_t i;
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char c;
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if (len == 0) /* Can we see this even ? */
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return 0;
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clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
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/* scan to see whether or not we got the magic character */
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for (i = 0; i != len; i++) {
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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set_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
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}
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imx2_wdt_ping();
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return len;
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}
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static const struct file_operations imx2_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.unlocked_ioctl = imx2_wdt_ioctl,
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.open = imx2_wdt_open,
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.release = imx2_wdt_close,
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.write = imx2_wdt_write,
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};
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static struct miscdevice imx2_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &imx2_wdt_fops,
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};
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static int __init imx2_wdt_probe(struct platform_device *pdev)
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{
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int ret;
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "can't get device resources\n");
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return -ENODEV;
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}
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imx2_wdt.base = devm_request_and_ioremap(&pdev->dev, res);
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if (!imx2_wdt.base) {
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dev_err(&pdev->dev, "ioremap failed\n");
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return -ENOMEM;
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}
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imx2_wdt.clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(imx2_wdt.clk)) {
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dev_err(&pdev->dev, "can't get Watchdog clock\n");
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return PTR_ERR(imx2_wdt.clk);
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}
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imx2_wdt.timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
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if (imx2_wdt.timeout != timeout)
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dev_warn(&pdev->dev, "Initial timeout out of range! "
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"Clamped from %u to %u\n", timeout, imx2_wdt.timeout);
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setup_timer(&imx2_wdt.timer, imx2_wdt_timer_ping, 0);
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imx2_wdt_miscdev.parent = &pdev->dev;
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ret = misc_register(&imx2_wdt_miscdev);
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if (ret)
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goto fail;
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dev_info(&pdev->dev,
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"IMX2+ Watchdog Timer enabled. timeout=%ds (nowayout=%d)\n",
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imx2_wdt.timeout, nowayout);
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return 0;
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fail:
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imx2_wdt_miscdev.parent = NULL;
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clk_put(imx2_wdt.clk);
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return ret;
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}
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static int __exit imx2_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&imx2_wdt_miscdev);
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if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
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del_timer_sync(&imx2_wdt.timer);
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dev_crit(imx2_wdt_miscdev.parent,
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"Device removed: Expect reboot!\n");
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} else
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clk_put(imx2_wdt.clk);
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imx2_wdt_miscdev.parent = NULL;
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return 0;
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}
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static void imx2_wdt_shutdown(struct platform_device *pdev)
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{
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if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
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/* we are running, we need to delete the timer but will give
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* max timeout before reboot will take place */
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del_timer_sync(&imx2_wdt.timer);
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imx2_wdt_set_timeout(IMX2_WDT_MAX_TIME);
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imx2_wdt_ping();
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dev_crit(imx2_wdt_miscdev.parent,
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"Device shutdown: Expect reboot!\n");
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}
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}
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static const struct of_device_id imx2_wdt_dt_ids[] = {
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{ .compatible = "fsl,imx21-wdt", },
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{ /* sentinel */ }
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};
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static struct platform_driver imx2_wdt_driver = {
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.remove = __exit_p(imx2_wdt_remove),
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.shutdown = imx2_wdt_shutdown,
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.of_match_table = imx2_wdt_dt_ids,
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},
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};
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static int __init imx2_wdt_init(void)
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{
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return platform_driver_probe(&imx2_wdt_driver, imx2_wdt_probe);
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}
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module_init(imx2_wdt_init);
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static void __exit imx2_wdt_exit(void)
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{
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platform_driver_unregister(&imx2_wdt_driver);
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}
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module_exit(imx2_wdt_exit);
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MODULE_AUTHOR("Wolfram Sang");
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MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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MODULE_ALIAS("platform:" DRIVER_NAME);
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