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54d8fe4425
The NCR5380_local_declare and NCR5380_setup macros exist to define and initialize a particular local variable, to provide the address of the chip registers needed for the driver's implementation of its NCR5380_read/write register access macros. In cumana_1 and macscsi, these macros generate pointless code like this, struct Scsi_Host *_instance; _instance = instance; In pas16, the use of NCR5380_read/write in pas16_hw_detect() requires that the io_port local variable has been defined and initialized, but the NCR5380_local_declare and NCR5380_setup macros can't be used for that purpose because the Scsi_Host struct has not yet been instantiated. Moreover, these macros were removed from atari_NCR5380.c long ago and now they constitute yet another discrepancy between the two core driver forks. Remove these "optimizations". Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Reviewed-by: Hannes Reinecke <hare@suse.com> Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
96 lines
2.3 KiB
C
96 lines
2.3 KiB
C
/*
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* Generic Generic NCR5380 driver defines
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*
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* Copyright 1993, Drew Eckhardt
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* Visionary Computing
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* (Unix and Linux consulting and custom programming)
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* drew@colorado.edu
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* +1 (303) 440-4894
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*
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* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
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* K.Lentin@cs.monash.edu.au
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*/
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#ifndef GENERIC_NCR5380_H
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#define GENERIC_NCR5380_H
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#ifdef NCR53C400
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#define BIOSPARAM
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#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
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#else
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#define NCR5380_BIOSPARAM NULL
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#endif
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#ifndef CMD_PER_LUN
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#define CMD_PER_LUN 2
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#endif
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#ifndef CAN_QUEUE
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#define CAN_QUEUE 16
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#endif
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#define __STRVAL(x) #x
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#define STRVAL(x) __STRVAL(x)
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#ifndef SCSI_G_NCR5380_MEM
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#define NCR5380_map_type int
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#define NCR5380_map_name port
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#define NCR5380_instance_name io_port
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#define NCR53C400_register_offset 0
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#define NCR53C400_address_adjust 8
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#ifdef NCR53C400
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#define NCR5380_region_size 16
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#else
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#define NCR5380_region_size 8
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#endif
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#define NCR5380_read(reg) \
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inb(instance->io_port + (reg))
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#define NCR5380_write(reg, value) \
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outb(value, instance->io_port + (reg))
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#define NCR5380_implementation_fields /* none */
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#else
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/* therefore SCSI_G_NCR5380_MEM */
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#define NCR5380_map_type unsigned long
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#define NCR5380_map_name base
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#define NCR5380_instance_name base
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#define NCR53C400_register_offset 0x108
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#define NCR53C400_address_adjust 0
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#define NCR53C400_mem_base 0x3880
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#define NCR53C400_host_buffer 0x3900
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#define NCR5380_region_size 0x3a00
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#define NCR5380_read(reg) \
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readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
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NCR53C400_mem_base + (reg))
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#define NCR5380_write(reg, value) \
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writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
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NCR53C400_mem_base + (reg))
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#define NCR5380_implementation_fields \
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void __iomem *iomem;
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#endif
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#define NCR5380_intr generic_NCR5380_intr
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#define NCR5380_queue_command generic_NCR5380_queue_command
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#define NCR5380_abort generic_NCR5380_abort
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#define NCR5380_bus_reset generic_NCR5380_bus_reset
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#define NCR5380_pread generic_NCR5380_pread
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#define NCR5380_pwrite generic_NCR5380_pwrite
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#define NCR5380_info generic_NCR5380_info
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#define NCR5380_show_info generic_NCR5380_show_info
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#define BOARD_NCR5380 0
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#define BOARD_NCR53C400 1
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#define BOARD_NCR53C400A 2
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#define BOARD_DTC3181E 3
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#endif /* GENERIC_NCR5380_H */
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