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07999587b7
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
21 lines
809 B
Plaintext
21 lines
809 B
Plaintext
Tegra SOC USB controllers
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The device node for a USB controller that is part of a Tegra
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SOC is as described in the document "Open Firmware Recommended
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Practice : Universal Serial Bus" with the following modifications
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and additions :
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Required properties :
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- compatible : Should be "nvidia,tegra20-ehci".
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- nvidia,phy : phandle of the PHY that the controller is connected to.
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- clocks : Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- usb
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Optional properties:
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- nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
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USB ports, which need reset twice due to hardware issues.
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