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6cb971114f
Use the simple-bus node to discover the io area, and remap the cached and bypass io ranges. The parent-bus-address value of the first triplet in the "ranges" property is used. This value is rounded down to the nearest 256MB boundary. The length of the io area is fixed at 256MB; the "ranges" property length value is ignored. Other limitations: (1) only the first simple-bus node is considered, and (2) only the first triplet of the "ranges" property is considered. See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the "ranges" property description. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
65 lines
2.6 KiB
Plaintext
65 lines
2.6 KiB
Plaintext
MMUv3 initialization sequence.
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The code in the initialize_mmu macro sets up MMUv3 memory mapping
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identically to MMUv2 fixed memory mapping. Depending on
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CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX symbol this code is
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located in one of the following address ranges:
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0xF0000000..0xFFFFFFFF (will keep same address in MMU v2 layout;
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typically ROM)
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0x00000000..0x07FFFFFF (system RAM; this code is actually linked
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at 0xD0000000..0xD7FFFFFF [cached]
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or 0xD8000000..0xDFFFFFFF [uncached];
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in any case, initially runs elsewhere
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than linked, so have to be careful)
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The code has the following assumptions:
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This code fragment is run only on an MMU v3.
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TLBs are in their reset state.
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ITLBCFG and DTLBCFG are zero (reset state).
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RASID is 0x04030201 (reset state).
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PS.RING is zero (reset state).
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LITBASE is zero (reset state, PC-relative literals); required to be PIC.
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TLB setup proceeds along the following steps.
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Legend:
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VA = virtual address (two upper nibbles of it);
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PA = physical address (two upper nibbles of it);
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pc = physical range that contains this code;
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After step 2, we jump to virtual address in 0x40000000..0x5fffffff
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that corresponds to next instruction to execute in this code.
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After step 4, we jump to intended (linked) address of this code.
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Step 0 Step1 Step 2 Step3 Step 4 Step5
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============ ===== ============ ===== ============ =====
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VA PA PA VA PA PA VA PA PA
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------ -- -- ------ -- -- ------ -- --
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E0..FF -> E0 -> E0 E0..FF -> E0 F0..FF -> F0 -> F0
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C0..DF -> C0 -> C0 C0..DF -> C0 E0..EF -> F0 -> F0
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A0..BF -> A0 -> A0 A0..BF -> A0 D8..DF -> 00 -> 00
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80..9F -> 80 -> 80 80..9F -> 80 D0..D7 -> 00 -> 00
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60..7F -> 60 -> 60 60..7F -> 60
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40..5F -> 40 40..5F -> pc -> pc 40..5F -> pc
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20..3F -> 20 -> 20 20..3F -> 20
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00..1F -> 00 -> 00 00..1F -> 00
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The default location of IO peripherals is above 0xf0000000. This may change
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using a "ranges" property in a device tree simple-bus node. See ePAPR 1.1, §6.5
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for details on the syntax and semantic of simple-bus nodes. The following
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limitations apply:
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1. Only top level simple-bus nodes are considered
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2. Only one (first) simple-bus node is considered
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3. Empty "ranges" properties are not supported
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4. Only the first triplet in the "ranges" property is considered
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5. The parent-bus-address value is rounded down to the nearest 256MB boundary
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6. The IO area covers the entire 256MB segment of parent-bus-address; the
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"ranges" triplet length field is ignored
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