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c0e50d4112
The original implementation could clobber registers under certain conditions. The Xtensa processor architecture uses windowed registers and the original implementation was using a4 as a temporary register, which under certain conditions could be register a0 of the oldest window frame, and didn't always restore the content correctly. By moving the _spill_registers routine inside the fast system call, it frees up one more register (the return address is not required anymore) for the spill routine. Signed-off-by: Chris Zankel <chris@zankel.net>
663 lines
19 KiB
ArmAsm
663 lines
19 KiB
ArmAsm
/*
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* arch/xtensa/kernel/vectors.S
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*
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* This file contains all exception vectors (user, kernel, and double),
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* as well as the window vectors (overflow and underflow), and the debug
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* vector. These are the primary vectors executed by the processor if an
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* exception occurs.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Copyright (C) 2005 - 2008 Tensilica, Inc.
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*
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* Chris Zankel <chris@zankel.net>
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*
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*/
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/*
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* We use a two-level table approach. The user and kernel exception vectors
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* use a first-level dispatch table to dispatch the exception to a registered
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* fast handler or the default handler, if no fast handler was registered.
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* The default handler sets up a C-stack and dispatches the exception to a
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* registerd C handler in the second-level dispatch table.
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*
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* Fast handler entry condition:
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*
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* a0: trashed, original value saved on stack (PT_AREG0)
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* a1: a1
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* a2: new stack pointer, original value in depc
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* a3: dispatch table
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* depc: a2, original value saved on stack (PT_DEPC)
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* excsave_1: a3
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*
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* The value for PT_DEPC saved to stack also functions as a boolean to
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* indicate that the exception is either a double or a regular exception:
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*
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* PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception
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* < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
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*
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* Note: Neither the kernel nor the user exception handler generate literals.
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*
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*/
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#include <linux/linkage.h>
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#include <asm/ptrace.h>
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#include <asm/current.h>
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#include <asm/asm-offsets.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#include <asm/vectors.h>
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#define WINDOW_VECTORS_SIZE 0x180
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/*
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* User exception vector. (Exceptions with PS.UM == 1, PS.EXCM == 0)
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*
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* We get here when an exception occurred while we were in userland.
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* We switch to the kernel stack and jump to the first level handler
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* associated to the exception cause.
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*
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* Note: the saved kernel stack pointer (EXC_TABLE_KSTK) is already
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* decremented by PT_USER_SIZE.
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*/
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.section .UserExceptionVector.text, "ax"
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ENTRY(_UserExceptionVector)
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xsr a3, excsave1 # save a3 and get dispatch table
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wsr a2, depc # save a2
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l32i a2, a3, EXC_TABLE_KSTK # load kernel stack to a2
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s32i a0, a2, PT_AREG0 # save a0 to ESF
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rsr a0, exccause # retrieve exception cause
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s32i a0, a2, PT_DEPC # mark it as a regular exception
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addx4 a0, a0, a3 # find entry in table
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l32i a0, a0, EXC_TABLE_FAST_USER # load handler
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xsr a3, excsave1 # restore a3 and dispatch table
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jx a0
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ENDPROC(_UserExceptionVector)
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/*
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* Kernel exception vector. (Exceptions with PS.UM == 0, PS.EXCM == 0)
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*
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* We get this exception when we were already in kernel space.
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* We decrement the current stack pointer (kernel) by PT_SIZE and
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* jump to the first-level handler associated with the exception cause.
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*
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* Note: we need to preserve space for the spill region.
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*/
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.section .KernelExceptionVector.text, "ax"
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ENTRY(_KernelExceptionVector)
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xsr a3, excsave1 # save a3, and get dispatch table
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wsr a2, depc # save a2
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addi a2, a1, -16-PT_SIZE # adjust stack pointer
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s32i a0, a2, PT_AREG0 # save a0 to ESF
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rsr a0, exccause # retrieve exception cause
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s32i a0, a2, PT_DEPC # mark it as a regular exception
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addx4 a0, a0, a3 # find entry in table
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l32i a0, a0, EXC_TABLE_FAST_KERNEL # load handler address
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xsr a3, excsave1 # restore a3 and dispatch table
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jx a0
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ENDPROC(_KernelExceptionVector)
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/*
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* Double exception vector (Exceptions with PS.EXCM == 1)
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* We get this exception when another exception occurs while were are
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* already in an exception, such as window overflow/underflow exception,
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* or 'expected' exceptions, for example memory exception when we were trying
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* to read data from an invalid address in user space.
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*
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* Note that this vector is never invoked for level-1 interrupts, because such
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* interrupts are disabled (masked) when PS.EXCM is set.
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*
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* We decode the exception and take the appropriate action. However, the
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* double exception vector is much more careful, because a lot more error
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* cases go through the double exception vector than through the user and
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* kernel exception vectors.
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*
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* Occasionally, the kernel expects a double exception to occur. This usually
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* happens when accessing user-space memory with the user's permissions
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* (l32e/s32e instructions). The kernel state, though, is not always suitable
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* for immediate transfer of control to handle_double, where "normal" exception
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* processing occurs. Also in kernel mode, TLB misses can occur if accessing
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* vmalloc memory, possibly requiring repair in a double exception handler.
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*
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* The variable at TABLE_FIXUP offset from the pointer in EXCSAVE_1 doubles as
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* a boolean variable and a pointer to a fixup routine. If the variable
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* EXC_TABLE_FIXUP is non-zero, this handler jumps to that address. A value of
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* zero indicates to use the default kernel/user exception handler.
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* There is only one exception, when the value is identical to the exc_table
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* label, the kernel is in trouble. This mechanism is used to protect critical
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* sections, mainly when the handler writes to the stack to assert the stack
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* pointer is valid. Once the fixup/default handler leaves that area, the
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* EXC_TABLE_FIXUP variable is reset to the fixup handler or zero.
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*
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* Procedures wishing to use this mechanism should set EXC_TABLE_FIXUP to the
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* nonzero address of a fixup routine before it could cause a double exception
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* and reset it before it returns.
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*
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* Some other things to take care of when a fast exception handler doesn't
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* specify a particular fixup handler but wants to use the default handlers:
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*
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* - The original stack pointer (in a1) must not be modified. The fast
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* exception handler should only use a2 as the stack pointer.
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*
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* - If the fast handler manipulates the stack pointer (in a2), it has to
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* register a valid fixup handler and cannot use the default handlers.
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*
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* - The handler can use any other generic register from a3 to a15, but it
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* must save the content of these registers to stack (PT_AREG3...PT_AREGx)
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*
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* - These registers must be saved before a double exception can occur.
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*
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* - If we ever implement handling signals while in double exceptions, the
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* number of registers a fast handler has saved (excluding a0 and a1) must
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* be written to PT_AREG1. (1 if only a3 is used, 2 for a3 and a4, etc. )
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*
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* The fixup handlers are special handlers:
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*
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* - Fixup entry conditions differ from regular exceptions:
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*
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* a0: DEPC
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* a1: a1
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* a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
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* a3: exctable
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* depc: a0
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* excsave_1: a3
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*
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* - When the kernel enters the fixup handler, it still assumes it is in a
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* critical section, so EXC_TABLE_FIXUP variable is set to exc_table.
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* The fixup handler, therefore, has to re-register itself as the fixup
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* handler before it returns from the double exception.
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*
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* - Fixup handler can share the same exception frame with the fast handler.
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* The kernel stack pointer is not changed when entering the fixup handler.
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*
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* - Fixup handlers can jump to the default kernel and user exception
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* handlers. Before it jumps, though, it has to setup a exception frame
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* on stack. Because the default handler resets the register fixup handler
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* the fixup handler must make sure that the default handler returns to
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* it instead of the exception address, so it can re-register itself as
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* the fixup handler.
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*
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* In case of a critical condition where the kernel cannot recover, we jump
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* to unrecoverable_exception with the following entry conditions.
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* All registers a0...a15 are unchanged from the last exception, except:
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*
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* a0: last address before we jumped to the unrecoverable_exception.
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* excsave_1: a0
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*
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*
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* See the handle_alloca_user and spill_registers routines for example clients.
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*
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* FIXME: Note: we currently don't allow signal handling coming from a double
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* exception, so the item markt with (*) is not required.
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*/
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.section .DoubleExceptionVector.text, "ax"
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.begin literal_prefix .DoubleExceptionVector
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.globl _DoubleExceptionVector_WindowUnderflow
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.globl _DoubleExceptionVector_WindowOverflow
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ENTRY(_DoubleExceptionVector)
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xsr a3, excsave1
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s32i a2, a3, EXC_TABLE_DOUBLE_SAVE
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/* Check for kernel double exception (usually fatal). */
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rsr a2, ps
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_bbci.l a2, PS_UM_BIT, .Lksp
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/* Check if we are currently handling a window exception. */
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/* Note: We don't need to indicate that we enter a critical section. */
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xsr a0, depc # get DEPC, save a0
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movi a2, WINDOW_VECTORS_VADDR
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_bltu a0, a2, .Lfixup
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addi a2, a2, WINDOW_VECTORS_SIZE
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_bgeu a0, a2, .Lfixup
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/* Window overflow/underflow exception. Get stack pointer. */
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l32i a2, a3, EXC_TABLE_KSTK
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/* Check for overflow/underflow exception, jump if overflow. */
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bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow
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/*
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* Restart window underflow exception.
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* Currently:
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* depc = orig a0,
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* a0 = orig DEPC,
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* a2 = new sp based on KSTK from exc_table
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* a3 = excsave_1
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* excsave_1 = orig a3
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*
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* We return to the instruction in user space that caused the window
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* underflow exception. Therefore, we change window base to the value
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* before we entered the window underflow exception and prepare the
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* registers to return as if we were coming from a regular exception
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* by changing depc (in a0).
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* Note: We can trash the current window frame (a0...a3) and depc!
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*/
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_DoubleExceptionVector_WindowUnderflow:
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xsr a3, excsave1
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wsr a2, depc # save stack pointer temporarily
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rsr a0, ps
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extui a0, a0, PS_OWB_SHIFT, PS_OWB_WIDTH
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wsr a0, windowbase
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rsync
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/* We are now in the previous window frame. Save registers again. */
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xsr a2, depc # save a2 and get stack pointer
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s32i a0, a2, PT_AREG0
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xsr a3, excsave1
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rsr a0, exccause
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s32i a0, a2, PT_DEPC # mark it as a regular exception
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addx4 a0, a0, a3
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xsr a3, excsave1
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l32i a0, a0, EXC_TABLE_FAST_USER
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jx a0
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/*
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* We only allow the ITLB miss exception if we are in kernel space.
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* All other exceptions are unexpected and thus unrecoverable!
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*/
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#ifdef CONFIG_MMU
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.extern fast_second_level_miss_double_kernel
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.Lksp: /* a0: a0, a1: a1, a2: a2, a3: trashed, depc: depc, excsave: a3 */
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rsr a3, exccause
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beqi a3, EXCCAUSE_ITLB_MISS, 1f
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addi a3, a3, -EXCCAUSE_DTLB_MISS
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bnez a3, .Lunrecoverable
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1: movi a3, fast_second_level_miss_double_kernel
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jx a3
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#else
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.equ .Lksp, .Lunrecoverable
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#endif
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/* Critical! We can't handle this situation. PANIC! */
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.extern unrecoverable_exception
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.Lunrecoverable_fixup:
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l32i a2, a3, EXC_TABLE_DOUBLE_SAVE
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xsr a0, depc
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.Lunrecoverable:
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rsr a3, excsave1
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wsr a0, excsave1
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movi a0, unrecoverable_exception
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callx0 a0
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.Lfixup:/* Check for a fixup handler or if we were in a critical section. */
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/* a0: depc, a1: a1, a2: trash, a3: exctable, depc: a0, excsave1: a3 */
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/* Enter critical section. */
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l32i a2, a3, EXC_TABLE_FIXUP
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s32i a3, a3, EXC_TABLE_FIXUP
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beq a2, a3, .Lunrecoverable_fixup # critical section
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beqz a2, .Ldflt # no handler was registered
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/* a0: depc, a1: a1, a2: trash, a3: exctable, depc: a0, excsave: a3 */
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jx a2
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.Ldflt: /* Get stack pointer. */
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l32i a2, a3, EXC_TABLE_DOUBLE_SAVE
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addi a2, a2, -PT_USER_SIZE
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/* a0: depc, a1: a1, a2: kstk, a3: exctable, depc: a0, excsave: a3 */
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s32i a0, a2, PT_DEPC
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l32i a0, a3, EXC_TABLE_DOUBLE_SAVE
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xsr a0, depc
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s32i a0, a2, PT_AREG0
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/* a0: avail, a1: a1, a2: kstk, a3: exctable, depc: a2, excsave: a3 */
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rsr a0, exccause
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addx4 a0, a0, a3
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xsr a3, excsave1
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l32i a0, a0, EXC_TABLE_FAST_USER
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jx a0
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/*
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* Restart window OVERFLOW exception.
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* Currently:
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* depc = orig a0,
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* a0 = orig DEPC,
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* a2 = new sp based on KSTK from exc_table
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* a3 = EXCSAVE_1
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* excsave_1 = orig a3
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*
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* We return to the instruction in user space that caused the window
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* overflow exception. Therefore, we change window base to the value
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* before we entered the window overflow exception and prepare the
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* registers to return as if we were coming from a regular exception
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* by changing DEPC (in a0).
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*
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* NOTE: We CANNOT trash the current window frame (a0...a3), but we
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* can clobber depc.
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*
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* The tricky part here is that overflow8 and overflow12 handlers
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* save a0, then clobber a0. To restart the handler, we have to restore
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* a0 if the double exception was past the point where a0 was clobbered.
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*
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* To keep things simple, we take advantage of the fact all overflow
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* handlers save a0 in their very first instruction. If DEPC was past
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* that instruction, we can safely restore a0 from where it was saved
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* on the stack.
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*
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* a0: depc, a1: a1, a2: kstk, a3: exc_table, depc: a0, excsave1: a3
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*/
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_DoubleExceptionVector_WindowOverflow:
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extui a2, a0, 0, 6 # get offset into 64-byte vector handler
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beqz a2, 1f # if at start of vector, don't restore
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addi a0, a0, -128
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bbsi a0, 8, 1f # don't restore except for overflow 8 and 12
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bbsi a0, 7, 2f
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/*
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* Restore a0 as saved by _WindowOverflow8().
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*
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* FIXME: we really need a fixup handler for this L32E,
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* for the extremely unlikely case where the overflow handler's
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* reference thru a0 gets a hardware TLB refill that bumps out
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* the (distinct, aliasing) TLB entry that mapped its prior
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* references thru a9, and where our reference now thru a9
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* gets a 2nd-level miss exception (not hardware TLB refill).
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*/
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l32e a2, a9, -16
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wsr a2, depc # replace the saved a0
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j 1f
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2:
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/*
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* Restore a0 as saved by _WindowOverflow12().
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*
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* FIXME: we really need a fixup handler for this L32E,
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* for the extremely unlikely case where the overflow handler's
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* reference thru a0 gets a hardware TLB refill that bumps out
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* the (distinct, aliasing) TLB entry that mapped its prior
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* references thru a13, and where our reference now thru a13
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* gets a 2nd-level miss exception (not hardware TLB refill).
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*/
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l32e a2, a13, -16
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wsr a2, depc # replace the saved a0
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1:
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/*
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* Restore WindowBase while leaving all address registers restored.
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* We have to use ROTW for this, because WSR.WINDOWBASE requires
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* an address register (which would prevent restore).
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*
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* Window Base goes from 0 ... 7 (Module 8)
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* Window Start is 8 bits; Ex: (0b1010 1010):0x55 from series of call4s
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*/
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rsr a0, ps
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extui a0, a0, PS_OWB_SHIFT, PS_OWB_WIDTH
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rsr a2, windowbase
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sub a0, a2, a0
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extui a0, a0, 0, 3
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l32i a2, a3, EXC_TABLE_DOUBLE_SAVE
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xsr a3, excsave1
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beqi a0, 1, .L1pane
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beqi a0, 3, .L3pane
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rsr a0, depc
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rotw -2
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/*
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* We are now in the user code's original window frame.
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* Process the exception as a user exception as if it was
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* taken by the user code.
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*
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* This is similar to the user exception vector,
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* except that PT_DEPC isn't set to EXCCAUSE.
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*/
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1:
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xsr a3, excsave1
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wsr a2, depc
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l32i a2, a3, EXC_TABLE_KSTK
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s32i a0, a2, PT_AREG0
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rsr a0, exccause
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s32i a0, a2, PT_DEPC
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addx4 a0, a0, a3
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l32i a0, a0, EXC_TABLE_FAST_USER
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xsr a3, excsave1
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jx a0
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.L1pane:
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rsr a0, depc
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rotw -1
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j 1b
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.L3pane:
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rsr a0, depc
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rotw -3
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j 1b
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|
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|
.end literal_prefix
|
|
|
|
ENDPROC(_DoubleExceptionVector)
|
|
|
|
/*
|
|
* Debug interrupt vector
|
|
*
|
|
* There is not much space here, so simply jump to another handler.
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|
* EXCSAVE[DEBUGLEVEL] has been set to that handler.
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|
*/
|
|
|
|
.section .DebugInterruptVector.text, "ax"
|
|
|
|
ENTRY(_DebugInterruptVector)
|
|
|
|
xsr a0, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
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|
jx a0
|
|
|
|
ENDPROC(_DebugInterruptVector)
|
|
|
|
|
|
|
|
/*
|
|
* Medium priority level interrupt vectors
|
|
*
|
|
* Each takes less than 16 (0x10) bytes, no literals, by placing
|
|
* the extra 8 bytes that would otherwise be required in the window
|
|
* vectors area where there is space. With relocatable vectors,
|
|
* all vectors are within ~ 4 kB range of each other, so we can
|
|
* simply jump (J) to another vector without having to use JX.
|
|
*
|
|
* common_exception code gets current IRQ level in PS.INTLEVEL
|
|
* and preserves it for the IRQ handling time.
|
|
*/
|
|
|
|
.macro irq_entry_level level
|
|
|
|
.if XCHAL_EXCM_LEVEL >= \level
|
|
.section .Level\level\()InterruptVector.text, "ax"
|
|
ENTRY(_Level\level\()InterruptVector)
|
|
wsr a0, excsave2
|
|
rsr a0, epc\level
|
|
wsr a0, epc1
|
|
movi a0, EXCCAUSE_LEVEL1_INTERRUPT
|
|
wsr a0, exccause
|
|
rsr a0, eps\level
|
|
# branch to user or kernel vector
|
|
j _SimulateUserKernelVectorException
|
|
.endif
|
|
|
|
.endm
|
|
|
|
irq_entry_level 2
|
|
irq_entry_level 3
|
|
irq_entry_level 4
|
|
irq_entry_level 5
|
|
irq_entry_level 6
|
|
|
|
|
|
/* Window overflow and underflow handlers.
|
|
* The handlers must be 64 bytes apart, first starting with the underflow
|
|
* handlers underflow-4 to underflow-12, then the overflow handlers
|
|
* overflow-4 to overflow-12.
|
|
*
|
|
* Note: We rerun the underflow handlers if we hit an exception, so
|
|
* we try to access any page that would cause a page fault early.
|
|
*/
|
|
|
|
#define ENTRY_ALIGN64(name) \
|
|
.globl name; \
|
|
.align 64; \
|
|
name:
|
|
|
|
.section .WindowVectors.text, "ax"
|
|
|
|
|
|
/* 4-Register Window Overflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowOverflow4)
|
|
|
|
s32e a0, a5, -16
|
|
s32e a1, a5, -12
|
|
s32e a2, a5, -8
|
|
s32e a3, a5, -4
|
|
rfwo
|
|
|
|
ENDPROC(_WindowOverflow4)
|
|
|
|
|
|
#if XCHAL_EXCM_LEVEL >= 2
|
|
/* Not a window vector - but a convenient location
|
|
* (where we know there's space) for continuation of
|
|
* medium priority interrupt dispatch code.
|
|
* On entry here, a0 contains PS, and EPC2 contains saved a0:
|
|
*/
|
|
.align 4
|
|
_SimulateUserKernelVectorException:
|
|
addi a0, a0, (1 << PS_EXCM_BIT)
|
|
wsr a0, ps
|
|
bbsi.l a0, PS_UM_BIT, 1f # branch if user mode
|
|
rsr a0, excsave2 # restore a0
|
|
j _KernelExceptionVector # simulate kernel vector exception
|
|
1: rsr a0, excsave2 # restore a0
|
|
j _UserExceptionVector # simulate user vector exception
|
|
#endif
|
|
|
|
|
|
/* 4-Register Window Underflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowUnderflow4)
|
|
|
|
l32e a0, a5, -16
|
|
l32e a1, a5, -12
|
|
l32e a2, a5, -8
|
|
l32e a3, a5, -4
|
|
rfwu
|
|
|
|
ENDPROC(_WindowUnderflow4)
|
|
|
|
/* 8-Register Window Overflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowOverflow8)
|
|
|
|
s32e a0, a9, -16
|
|
l32e a0, a1, -12
|
|
s32e a2, a9, -8
|
|
s32e a1, a9, -12
|
|
s32e a3, a9, -4
|
|
s32e a4, a0, -32
|
|
s32e a5, a0, -28
|
|
s32e a6, a0, -24
|
|
s32e a7, a0, -20
|
|
rfwo
|
|
|
|
ENDPROC(_WindowOverflow8)
|
|
|
|
/* 8-Register Window Underflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowUnderflow8)
|
|
|
|
l32e a1, a9, -12
|
|
l32e a0, a9, -16
|
|
l32e a7, a1, -12
|
|
l32e a2, a9, -8
|
|
l32e a4, a7, -32
|
|
l32e a3, a9, -4
|
|
l32e a5, a7, -28
|
|
l32e a6, a7, -24
|
|
l32e a7, a7, -20
|
|
rfwu
|
|
|
|
ENDPROC(_WindowUnderflow8)
|
|
|
|
/* 12-Register Window Overflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowOverflow12)
|
|
|
|
s32e a0, a13, -16
|
|
l32e a0, a1, -12
|
|
s32e a1, a13, -12
|
|
s32e a2, a13, -8
|
|
s32e a3, a13, -4
|
|
s32e a4, a0, -48
|
|
s32e a5, a0, -44
|
|
s32e a6, a0, -40
|
|
s32e a7, a0, -36
|
|
s32e a8, a0, -32
|
|
s32e a9, a0, -28
|
|
s32e a10, a0, -24
|
|
s32e a11, a0, -20
|
|
rfwo
|
|
|
|
ENDPROC(_WindowOverflow12)
|
|
|
|
/* 12-Register Window Underflow Vector (Handler) */
|
|
|
|
ENTRY_ALIGN64(_WindowUnderflow12)
|
|
|
|
l32e a1, a13, -12
|
|
l32e a0, a13, -16
|
|
l32e a11, a1, -12
|
|
l32e a2, a13, -8
|
|
l32e a4, a11, -48
|
|
l32e a8, a11, -32
|
|
l32e a3, a13, -4
|
|
l32e a5, a11, -44
|
|
l32e a6, a11, -40
|
|
l32e a7, a11, -36
|
|
l32e a9, a11, -28
|
|
l32e a10, a11, -24
|
|
l32e a11, a11, -20
|
|
rfwu
|
|
|
|
ENDPROC(_WindowUnderflow12)
|
|
|
|
.text
|