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1965aae3c9
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since: a. the double underscore is ugly and pointless. b. no leading underscore violates namespace constraints. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
#ifndef _ASM_X86_MMU_CONTEXT_64_H
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#define _ASM_X86_MMU_CONTEXT_64_H
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#include <asm/pda.h>
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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if (read_pda(mmu_state) == TLBSTATE_OK)
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write_pda(mmu_state, TLBSTATE_LAZY);
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#endif
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned cpu = smp_processor_id();
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if (likely(prev != next)) {
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/* stop flush ipis for the previous mm */
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cpu_clear(cpu, prev->cpu_vm_mask);
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#ifdef CONFIG_SMP
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write_pda(mmu_state, TLBSTATE_OK);
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write_pda(active_mm, next);
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#endif
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cpu_set(cpu, next->cpu_vm_mask);
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load_cr3(next->pgd);
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if (unlikely(next->context.ldt != prev->context.ldt))
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load_LDT_nolock(&next->context);
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}
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#ifdef CONFIG_SMP
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else {
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write_pda(mmu_state, TLBSTATE_OK);
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if (read_pda(active_mm) != next)
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BUG();
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
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/* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload CR3
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* to make sure to use no freed page tables.
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*/
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load_cr3(next->pgd);
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load_LDT_nolock(&next->context);
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}
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}
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#endif
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}
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#define deactivate_mm(tsk, mm) \
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do { \
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load_gs_index(0); \
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asm volatile("movl %0,%%fs"::"r"(0)); \
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} while (0)
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#endif /* _ASM_X86_MMU_CONTEXT_64_H */
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