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87466ccd94
The Armada 37xx SoC come with 2 pin controllers: one on the south bridge (managing 28 pins) and one on the north bridge (managing 36 pins). At the hardware level the controller configure the pins by group and not pin by pin. This constraint is reflected in the design of the driver: only the group related functions are implemented. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
49 lines
663 B
Plaintext
49 lines
663 B
Plaintext
if PLAT_ORION
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config PINCTRL_MVEBU
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bool
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select PINMUX
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select PINCONF
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config PINCTRL_DOVE
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bool
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select PINCTRL_MVEBU
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select MFD_SYSCON
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config PINCTRL_KIRKWOOD
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_370
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_375
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_38X
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_39X
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ARMADA_XP
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bool
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select PINCTRL_MVEBU
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config PINCTRL_ORION
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bool
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select PINCTRL_MVEBU
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endif
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config PINCTRL_ARMADA_37XX
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bool
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select GENERIC_PINCONF
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select MFD_SYSCON
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select PINCONF
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select PINMUX
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