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https://github.com/edk2-porting/linux-next.git
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6f2185f8e3
This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXF2yeRcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwH8jAP9OQaMl5llVXuHSFOwiqkJ2I09p oROxu3dI/A4q7d5T8QD/Xuo4piSAdoT5YZyHp16NUafW3L1//wqTvxk0ubeTsgA= =EIyo -----END PGP SIGNATURE----- Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers Reset controller changes for v5.1 This adds the include/linux/reset directory to MAINTAINERS for reset specific headers and adds headers for sunxi and socfpga in there to get rid of a few extern function declarations. There is a new reset driver for the Broadcom STB reset controller and the i.MX7 system reset controller driver is extended to support i.MX8MQ as well. Finally, there is a new header with reset id constants for the Meson G12A SoC, which has a reset controller identical to Meson AXG and thus can reuse its driver and DT bindings. * tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: meson: add g12a bindings reset: imx7: Add support for i.MX8MQ IP block variant reset: imx7: Add plubming to support multiple IP variants reset: Add Broadcom STB SW_INIT reset controller driver dt-bindings: reset: Add document for Broadcom STB reset controller reset: socfpga: declare socfpga_reset_init in a header file reset: sunxi: declare sun6i_reset_init in a header file MAINTAINERS: use include/linux/reset for reset controller related headers dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
32 lines
1.3 KiB
Makefile
32 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-y += core.o
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obj-y += hisilicon/
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obj-$(CONFIG_ARCH_STI) += sti/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
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obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
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obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
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obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
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obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
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obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
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obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
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obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
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obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
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obj-$(CONFIG_RESET_MESON) += reset-meson.o
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obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
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obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
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obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
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obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
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obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
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obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
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