mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 06:34:11 +08:00
8418f8873a
Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
164 lines
3.9 KiB
C
164 lines
3.9 KiB
C
/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
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*
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* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <mach/i2c.h>
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#include <plat/regs-serial.h>
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#include <plat/gpio-cfg.h>
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#include <plat/s5p6440.h>
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#include <plat/clock.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#include <plat/iic.h>
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#include <plat/pll.h>
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#include <plat/adc.h>
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#include <plat/ts.h>
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#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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S3C2410_UCON_RXILEVEL | \
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S3C2410_UCON_TXIRQMODE | \
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S3C2410_UCON_RXIRQMODE | \
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S3C2410_UCON_RXFIFO_TOI | \
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S3C2443_UCON_RXERR_IRQEN)
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#define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8
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#define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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S3C2440_UFCON_TXTRIG16 | \
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S3C2410_UFCON_RXTRIG8)
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static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = SMDK6440_UCON_DEFAULT,
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.ulcon = SMDK6440_ULCON_DEFAULT,
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.ufcon = SMDK6440_UFCON_DEFAULT,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = SMDK6440_UCON_DEFAULT,
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.ulcon = SMDK6440_ULCON_DEFAULT,
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.ufcon = SMDK6440_UFCON_DEFAULT,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = SMDK6440_UCON_DEFAULT,
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.ulcon = SMDK6440_ULCON_DEFAULT,
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.ufcon = SMDK6440_UFCON_DEFAULT,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = SMDK6440_UCON_DEFAULT,
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.ulcon = SMDK6440_ULCON_DEFAULT,
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.ufcon = SMDK6440_UFCON_DEFAULT,
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},
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};
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static struct platform_device *smdk6440_devices[] __initdata = {
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&s3c_device_adc,
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&s3c_device_rtc,
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&s3c_device_i2c0,
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&s3c_device_i2c1,
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&s3c_device_ts,
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&s3c_device_wdt,
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&samsung_asoc_dma,
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&s5p6440_device_iis,
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};
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static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
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.flags = 0,
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.slave_addr = 0x10,
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.frequency = 100*1000,
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.sda_delay = 100,
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.cfg_gpio = s5p6440_i2c0_cfg_gpio,
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};
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static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
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.flags = 0,
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.bus_num = 1,
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.slave_addr = 0x10,
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.frequency = 100*1000,
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.sda_delay = 100,
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.cfg_gpio = s5p6440_i2c1_cfg_gpio,
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};
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static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
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{ I2C_BOARD_INFO("24c08", 0x50), },
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{ I2C_BOARD_INFO("wm8580", 0x1b), },
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};
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static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
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/* To be populated */
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};
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static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
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.delay = 10000,
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.presc = 49,
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.oversampling_shift = 2,
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};
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static void __init smdk6440_map_io(void)
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{
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s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
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s3c24xx_init_clocks(12000000);
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s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
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}
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static void __init smdk6440_machine_init(void)
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{
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s3c24xx_ts_set_platdata(&s3c_ts_platform);
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s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
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s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
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i2c_register_board_info(0, smdk6440_i2c_devs0,
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ARRAY_SIZE(smdk6440_i2c_devs0));
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i2c_register_board_info(1, smdk6440_i2c_devs1,
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ARRAY_SIZE(smdk6440_i2c_devs1));
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platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
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}
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MACHINE_START(SMDK6440, "SMDK6440")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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.boot_params = S5P64X0_PA_SDRAM + 0x100,
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.init_irq = s5p6440_init_irq,
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.map_io = smdk6440_map_io,
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.init_machine = smdk6440_machine_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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