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The Boot and Power Management Processor (BPMP) is a co-processor found on Tegra SoCs. It is designed to handle the early stages of the boot process and offload power management tasks (such as clocks, resets, powergates, ...) as well as system control services. Compared to the ARM SCPI, the services provided by BPMP are message- based rather than method-based. The BPMP firmware driver provides the services to transmit data to and receive data from the BPMP. Users can also register a Message ReQuest (MRQ), for which a service routine will be run when a corresponding event is received from the firmware. A set of messages, called the BPMP ABI, are specified for a number of different services provided by the BPMP (such as clocks or resets). Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo <josephl@nvidia.com>. Signed-off-by: Thierry Reding <treding@nvidia.com>
26 lines
866 B
Plaintext
26 lines
866 B
Plaintext
menu "Tegra firmware driver"
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config TEGRA_IVC
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bool "Tegra IVC protocol"
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depends on ARCH_TEGRA
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help
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IVC (Inter-VM Communication) protocol is part of the IPC
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(Inter Processor Communication) framework on Tegra. It maintains the
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data and the different commuication channels in SysRAM or RAM and
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keeps the content is synchronization between host CPU and remote
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processors.
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config TEGRA_BPMP
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bool "Tegra BPMP driver"
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depends on ARCH_TEGRA && TEGRA_HSP_MBOX && TEGRA_IVC
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help
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BPMP (Boot and Power Management Processor) is designed to off-loading
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the PM functions which include clock/DVFS/thermal/power from the CPU.
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It needs HSP as the HW synchronization and notification module and
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IVC module as the message communication protocol.
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This driver manages the IPC interface between host CPU and the
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firmware running on BPMP.
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endmenu
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