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Mainline Linux tree for various devices, only for fun :)
4ed7e4e578
- Add support for the new J721e SoC, includes basic peripherals needed for booting up the device - New peripheral support added for AM654x: * TI SCI irqchip * GPIO * MCU SRAM * R5Fs * MSMC RAM * SERDES and PCIe -----BEGIN PGP SIGNATURE----- iQJEBAABCAAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAl0KJB8QHHQta3Jpc3Rv QHRpLmNvbQAKCRDK+r0xeVAaEQf+D/9DkNeB2x9ktkLEdlmVv3hI3kqVTDvxz/8Q S8tLvhzqUmWcGbuEHteAp8Gsu/Zk9niy6bma1F+9NByewWfZUgwrvQEGp4eRgHbl 2d+M0jwPDXzeHpWXXtThP9mXpWiSns8jIvwUovOe+sSwpCfhYQydqhIipQpMVeya b5qKkLgnokVHG0AtK/U6WVAdv+QqHrFkifSwwRK1B8nuU+guzuBMxwkZlFd83axG Y01EknIlKkDlinjL/Hv5FKxNfNeD9a19r+76KCm8CrVvymkwERxxxLdf149yv3hK 6Nmh75tcZJpVE819SY9CQQW5huwRAfpu6Xg/h9qLleUWVG4WsguPqGP68LOGY8Cu AumZIQENo+5iu13L7V3R8k94JJSVbfQIyyH40LnWk89gohBA65WGGBBsXQ6wIPZ0 1j0AxT069oG12Y1WVoiVSxBK6PnF9NzSvgk/oRLObf7HgOzSh6T3Y43ZmzD3IppA omLDOqkgqh2t79u4atIU7ZWCQcp7hEQynLRy3tdp8+sUJx1aGr8LgEDj8p64Q1/Q d+q19jOenpcMHcwSY27r1uO1ddKDxzhGhV+px/3Wdt2OyR33BTvkP67CmeoO2TpZ 8fHXxEq+nroq2u4ciC3sbAAhYdvg1IQKkbmRFtYohbN1ezrGMwc+sGEJrkTrIBBa urtRfY2Hwg== =r10Q -----END PGP SIGNATURE----- Merge tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt Texas Instruments K3 SoC family changes for 5.3 - Add support for the new J721e SoC, includes basic peripherals needed for booting up the device - New peripheral support added for AM654x: * TI SCI irqchip * GPIO * MCU SRAM * R5Fs * MSMC RAM * SERDES and PCIe * tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: (26 commits) arm64: dts: ti: k3-j721e: Add the MCU SRAM node arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node arm64: defconfig: Enable TI's J721E SoC platform arm64: dts: ti: Add support for J721E Common Processor Board soc: ti: Add Support for J721E SoC config option arm64: dts: ti: Add Support for J721E SoC dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller dt-bindings: arm: ti: Add bindings for J721E SoC arm64: dts: ti: am654-base-board: Disable SERDES and PCIe arm64: dts: k3-am6: Add PCIe Endpoint DT node arm64: dts: k3-am6: Add PCIe Root Complex DT node arm64: dts: k3-am6: Add SERDES DT node arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes ... Signed-off-by: Olof Johansson <olof@lixom.net> |
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arch | ||
block | ||
certs | ||
crypto | ||
Documentation | ||
drivers | ||
fs | ||
include | ||
init | ||
ipc | ||
kernel | ||
lib | ||
LICENSES | ||
mm | ||
net | ||
samples | ||
scripts | ||
security | ||
sound | ||
tools | ||
usr | ||
virt | ||
.clang-format | ||
.cocciconfig | ||
.get_maintainer.ignore | ||
.gitattributes | ||
.gitignore | ||
.mailmap | ||
COPYING | ||
CREDITS | ||
Kbuild | ||
Kconfig | ||
MAINTAINERS | ||
Makefile | ||
README |
Linux kernel ============ There are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. Please read Documentation/admin-guide/README.rst first. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.