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4e1f864821
The SOF_FW_CRASHED state is meant to indicate the unfortunate case when the firmware has crashed after a successful boot. IPC tx timeout is not treated as indication of a firmware crash as it tends to happen regularly while the firmware is operational. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Paul Olaru <paul.olaru@oss.nxp.com> Link: https://lore.kernel.org/r/20211223113628.18582-8-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
185 lines
4.7 KiB
C
185 lines
4.7 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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//
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#include <linux/pci.h>
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#include "ops.h"
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static
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bool snd_sof_pci_update_bits_unlocked(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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struct pci_dev *pci = to_pci_dev(sdev->dev);
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unsigned int old, new;
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u32 ret = 0;
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pci_read_config_dword(pci, offset, &ret);
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old = ret;
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dev_dbg(sdev->dev, "Debug PCIR: %8.8x at %8.8x\n", old & mask, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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pci_write_config_dword(pci, offset, new);
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dev_dbg(sdev->dev, "Debug PCIW: %8.8x at %8.8x\n", value,
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offset);
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return true;
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}
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bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_pci_update_bits_unlocked(sdev, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_pci_update_bits);
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bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_unlocked);
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bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u64 mask, u64 value)
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{
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u64 old, new;
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old = snd_sof_dsp_read64(sdev, bar, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write64(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64_unlocked);
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/* This is for registers bits with attribute RWC */
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bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits);
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bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u64 mask, u64 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits64_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64);
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static
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void snd_sof_dsp_update_bits_forced_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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snd_sof_dsp_write(sdev, bar, offset, new);
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}
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/* This is for registers bits with attribute RWC */
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void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned long flags;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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snd_sof_dsp_update_bits_forced_unlocked(sdev, bar, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_forced);
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/**
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* snd_sof_dsp_panic - handle a received DSP panic message
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* @sdev: Pointer to the device's sdev
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* @offset: offset of panic information
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* @non_recoverable: the panic is fatal, no recovery will be done by the caller
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*/
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void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset, bool non_recoverable)
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{
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/*
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* if DSP is not ready and the dsp_oops_offset is not yet set, use the
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* offset from the panic message.
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*/
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if (!sdev->dsp_oops_offset)
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sdev->dsp_oops_offset = offset;
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/*
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* Print warning if the offset from the panic message differs from
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* dsp_oops_offset
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*/
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if (sdev->dsp_oops_offset != offset)
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dev_warn(sdev->dev,
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"%s: dsp_oops_offset %zu differs from panic offset %u\n",
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__func__, sdev->dsp_oops_offset, offset);
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/*
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* Only print the panic information if we have non recoverable panic or
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* if all dumps should be printed
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*/
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if (non_recoverable || sof_debug_check_flag(SOF_DBG_PRINT_ALL_DUMPS)) {
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/* We want to see the DSP panic! */
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sdev->dbg_dump_printed = false;
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snd_sof_dsp_dbg_dump(sdev, "DSP panic!",
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SOF_DBG_DUMP_REGS | SOF_DBG_DUMP_MBOX);
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if (non_recoverable)
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sof_set_fw_state(sdev, SOF_FW_CRASHED);
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snd_sof_trace_notify_for_error(sdev);
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}
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}
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EXPORT_SYMBOL(snd_sof_dsp_panic);
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