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f10a04c034
At present, ARCH=powerpc kernels can waste considerable space in pagetables when making large hugepage mappings. Hugepage PTEs go in PMD pages, but each PMD page maps 256M and so contains only 16 hugepage PTEs (128 bytes of data), but takes up a 1024 byte allocation. With CONFIG_PPC_64K_PAGES enabled (64k base page size), the situation is worse. Now hugepage PTEs are at the PTE page level (also mapping 256M), so we store 16 hugepage PTEs in a 64k allocation. The PowerPC MMU already means that any 256M region is either all hugepage, or all normal pages. Thus, with some care, we can use a different allocation for the hugepage PTE tables and only allocate the 128 bytes necessary. Signed-off-by: Paul Mackerras <paulus@samba.org>
177 lines
5.2 KiB
C
177 lines
5.2 KiB
C
#ifndef _ASM_POWERPC_PAGE_64_H
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#define _ASM_POWERPC_PAGE_64_H
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#ifdef __KERNEL__
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/*
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* Copyright (C) 2001 PPC64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
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* specific, every notion of page number shared with the firmware, TCEs,
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* iommu, etc... still uses a page size of 4K.
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*/
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#define HW_PAGE_SHIFT 12
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#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
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#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
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/*
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* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
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* HW_PAGE_SHIFT, that is 4K pages.
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*/
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#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
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/* Segment size */
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#define SID_SHIFT 28
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#define SID_MASK 0xfffffffffUL
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#define ESID_MASK 0xfffffffff0000000UL
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#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
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#ifndef __ASSEMBLY__
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#include <asm/cache.h>
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typedef unsigned long pte_basic_t;
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static __inline__ void clear_page(void *addr)
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{
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unsigned long lines, line_size;
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line_size = ppc64_caches.dline_size;
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lines = ppc64_caches.dlines_per_page;
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__asm__ __volatile__(
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"mtctr %1 # clear_page\n\
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1: dcbz 0,%0\n\
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add %0,%0,%3\n\
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bdnz+ 1b"
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: "=r" (addr)
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: "r" (lines), "0" (addr), "r" (line_size)
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: "ctr", "memory");
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}
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extern void copy_4K_page(void *to, void *from);
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#ifdef CONFIG_PPC_64K_PAGES
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static inline void copy_page(void *to, void *from)
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{
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unsigned int i;
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for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
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copy_4K_page(to, from);
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to += 4096;
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from += 4096;
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}
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}
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#else /* CONFIG_PPC_64K_PAGES */
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static inline void copy_page(void *to, void *from)
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{
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copy_4K_page(to, from);
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}
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#endif /* CONFIG_PPC_64K_PAGES */
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/* Log 2 of page table size */
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extern u64 ppc64_pft_size;
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/* Large pages size */
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#ifdef CONFIG_HUGETLB_PAGE
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extern unsigned int HPAGE_SHIFT;
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#else
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#define HPAGE_SHIFT PAGE_SHIFT
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#endif
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#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_HUGETLB_PAGE
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#define HTLB_AREA_SHIFT 40
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#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
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#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
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#define LOW_ESID_MASK(addr, len) \
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(((1U << (GET_ESID(min((addr)+(len)-1, 0x100000000UL))+1)) \
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- (1U << GET_ESID(min((addr), 0x100000000UL)))) & 0xffff)
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#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
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- (1U << GET_HTLB_AREA(addr))) & 0xffff)
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#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
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#define ARCH_HAS_HUGETLB_FREE_PGD_RANGE
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#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
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#define ARCH_HAS_SETCLEAR_HUGE_PTE
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#define touches_hugepage_low_range(mm, addr, len) \
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(((addr) < 0x100000000UL) \
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&& (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas))
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#define touches_hugepage_high_range(mm, addr, len) \
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((((addr) + (len)) > 0x100000000UL) \
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&& (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas))
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#define __within_hugepage_low_range(addr, len, segmask) \
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( (((addr)+(len)) <= 0x100000000UL) \
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&& ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask)))
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#define within_hugepage_low_range(addr, len) \
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__within_hugepage_low_range((addr), (len), \
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current->mm->context.low_htlb_areas)
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#define __within_hugepage_high_range(addr, len, zonemask) \
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( ((addr) >= 0x100000000UL) \
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&& ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask)))
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#define within_hugepage_high_range(addr, len) \
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__within_hugepage_high_range((addr), (len), \
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current->mm->context.high_htlb_areas)
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#define is_hugepage_only_range(mm, addr, len) \
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(touches_hugepage_high_range((mm), (addr), (len)) || \
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touches_hugepage_low_range((mm), (addr), (len)))
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#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
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#define in_hugepage_area(context, addr) \
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(cpu_has_feature(CPU_FTR_16M_PAGE) && \
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( ( (addr) >= 0x100000000UL) \
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? ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) \
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: ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) )
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#else /* !CONFIG_HUGETLB_PAGE */
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#define in_hugepage_area(mm, addr) 0
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#endif /* !CONFIG_HUGETLB_PAGE */
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#ifdef MODULE
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#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
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#else
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#define __page_aligned \
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__attribute__((__aligned__(PAGE_SIZE), \
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__section__(".data.page_aligned")))
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#endif
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#define VM_DATA_DEFAULT_FLAGS \
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(test_thread_flag(TIF_32BIT) ? \
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VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
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/*
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* This is the default if a program doesn't have a PT_GNU_STACK
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* program header entry. The PPC64 ELF ABI has a non executable stack
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* stack by default, so in the absense of a PT_GNU_STACK program header
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* we turn execute permission off.
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*/
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#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#define VM_STACK_DEFAULT_FLAGS \
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(test_thread_flag(TIF_32BIT) ? \
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VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
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#include <asm-generic/page.h>
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PAGE_64_H */
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