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Provide a regcache_sync_region() operation which allows drivers to write only part of the cache back to the hardware. This is intended for use in cases like power domains or DSP memories where part of the device register map may be reset without fully resetting the device. Fully supporting these devices is likely to require additional work to make specific regions of the register map cache only while they are in reset, but this is enough for most devices. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
206 lines
6.7 KiB
C
206 lines
6.7 KiB
C
#ifndef __LINUX_REGMAP_H
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#define __LINUX_REGMAP_H
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/*
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* Register map access API
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*
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* Copyright 2011 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/device.h>
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#include <linux/list.h>
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struct module;
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struct i2c_client;
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struct spi_device;
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/* An enum of all the supported cache types */
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enum regcache_type {
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REGCACHE_NONE,
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REGCACHE_RBTREE,
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REGCACHE_COMPRESSED
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};
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/**
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* Default value for a register. We use an array of structs rather
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* than a simple array as many modern devices have very sparse
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* register maps.
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*
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* @reg: Register address.
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* @def: Register default value.
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*/
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struct reg_default {
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unsigned int reg;
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unsigned int def;
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};
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/**
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* Configuration for the register map of a device.
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*
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* @reg_bits: Number of bits in a register address, mandatory.
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* @val_bits: Number of bits in a register value, mandatory.
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*
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* @writeable_reg: Optional callback returning true if the register
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* can be written to.
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* @readable_reg: Optional callback returning true if the register
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* can be read from.
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* @volatile_reg: Optional callback returning true if the register
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* value can't be cached.
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* @precious_reg: Optional callback returning true if the rgister
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* should not be read outside of a call from the driver
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* (eg, a clear on read interrupt status register).
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*
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* @max_register: Optional, specifies the maximum valid register index.
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* @reg_defaults: Power on reset values for registers (for use with
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* register cache support).
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* @num_reg_defaults: Number of elements in reg_defaults.
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*
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* @read_flag_mask: Mask to be set in the top byte of the register when doing
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* a read.
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* @write_flag_mask: Mask to be set in the top byte of the register when doing
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* a write. If both read_flag_mask and write_flag_mask are
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* empty the regmap_bus default masks are used.
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*
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* @cache_type: The actual cache type.
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* @reg_defaults_raw: Power on reset values for registers (for use with
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* register cache support).
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* @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
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*/
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struct regmap_config {
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int reg_bits;
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int val_bits;
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bool (*writeable_reg)(struct device *dev, unsigned int reg);
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bool (*readable_reg)(struct device *dev, unsigned int reg);
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bool (*volatile_reg)(struct device *dev, unsigned int reg);
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bool (*precious_reg)(struct device *dev, unsigned int reg);
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unsigned int max_register;
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const struct reg_default *reg_defaults;
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unsigned int num_reg_defaults;
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enum regcache_type cache_type;
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const void *reg_defaults_raw;
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unsigned int num_reg_defaults_raw;
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u8 read_flag_mask;
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u8 write_flag_mask;
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};
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typedef int (*regmap_hw_write)(struct device *dev, const void *data,
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size_t count);
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typedef int (*regmap_hw_gather_write)(struct device *dev,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len);
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typedef int (*regmap_hw_read)(struct device *dev,
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const void *reg_buf, size_t reg_size,
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void *val_buf, size_t val_size);
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/**
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* Description of a hardware bus for the register map infrastructure.
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*
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* @write: Write operation.
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* @gather_write: Write operation with split register/value, return -ENOTSUPP
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* if not implemented on a given device.
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* @read: Read operation. Data is returned in the buffer used to transmit
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* data.
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* @read_flag_mask: Mask to be set in the top byte of the register when doing
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* a read.
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*/
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struct regmap_bus {
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regmap_hw_write write;
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regmap_hw_gather_write gather_write;
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regmap_hw_read read;
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u8 read_flag_mask;
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};
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struct regmap *regmap_init(struct device *dev,
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const struct regmap_bus *bus,
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const struct regmap_config *config);
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struct regmap *regmap_init_i2c(struct i2c_client *i2c,
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const struct regmap_config *config);
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struct regmap *regmap_init_spi(struct spi_device *dev,
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const struct regmap_config *config);
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void regmap_exit(struct regmap *map);
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int regmap_reinit_cache(struct regmap *map,
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const struct regmap_config *config);
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int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
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int regmap_raw_write(struct regmap *map, unsigned int reg,
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const void *val, size_t val_len);
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int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
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int regmap_raw_read(struct regmap *map, unsigned int reg,
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void *val, size_t val_len);
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int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
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size_t val_count);
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int regmap_update_bits(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val);
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int regmap_update_bits_check(struct regmap *map, unsigned int reg,
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unsigned int mask, unsigned int val,
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bool *change);
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int regcache_sync(struct regmap *map);
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int regcache_sync_region(struct regmap *map, unsigned int min,
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unsigned int max);
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void regcache_cache_only(struct regmap *map, bool enable);
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void regcache_cache_bypass(struct regmap *map, bool enable);
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void regcache_mark_dirty(struct regmap *map);
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int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
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int num_regs);
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/**
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* Description of an IRQ for the generic regmap irq_chip.
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*
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* @reg_offset: Offset of the status/mask register within the bank
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* @mask: Mask used to flag/control the register.
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*/
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struct regmap_irq {
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unsigned int reg_offset;
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unsigned int mask;
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};
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/**
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* Description of a generic regmap irq_chip. This is not intended to
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* handle every possible interrupt controller, but it should handle a
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* substantial proportion of those that are found in the wild.
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*
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* @name: Descriptive name for IRQ controller.
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*
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* @status_base: Base status register address.
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* @mask_base: Base mask register address.
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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*
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* @num_regs: Number of registers in each control bank.
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* @irqs: Descriptors for individual IRQs. Interrupt numbers are
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* assigned based on the index in the array of the interrupt.
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* @num_irqs: Number of descriptors.
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*/
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struct regmap_irq_chip {
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const char *name;
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unsigned int status_base;
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unsigned int mask_base;
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unsigned int ack_base;
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int num_regs;
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const struct regmap_irq *irqs;
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int num_irqs;
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};
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struct regmap_irq_chip_data;
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int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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int irq_base, struct regmap_irq_chip *chip,
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struct regmap_irq_chip_data **data);
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void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
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int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
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#endif
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