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https://github.com/edk2-porting/linux-next.git
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d7b417fa08
DMA access to encrypted memory cannot be performed when SEV is active. In order for DMA to properly work when SEV is active, the SWIOTLB bounce buffers must be used. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de>C Tested-by: Borislav Petkov <bp@suse.de> Cc: kvm@vger.kernel.org Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Borislav Petkov <bp@alien8.de> Link: https://lkml.kernel.org/r/20171020143059.3291-12-brijesh.singh@amd.com
1087 lines
30 KiB
C
1087 lines
30 KiB
C
/*
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* Dynamic DMA mapping support.
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*
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* This implementation is a fallback for platforms that do not support
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* I/O TLBs (aka DMA address translation hardware).
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* Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
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* Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
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* Copyright (C) 2000, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
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* 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
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* unnecessary i-cache flushing.
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* 04/07/.. ak Better overflow handling. Assorted fixes.
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* 05/09/10 linville Add support for syncing ranges, support syncing for
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* DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
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* 08/12/11 beckyb Add highmem support
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*/
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#include <linux/cache.h>
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#include <linux/dma-mapping.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/swiotlb.h>
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#include <linux/pfn.h>
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#include <linux/types.h>
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#include <linux/ctype.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/scatterlist.h>
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#include <linux/mem_encrypt.h>
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/iommu-helper.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/swiotlb.h>
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#define OFFSET(val,align) ((unsigned long) \
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( (val) & ( (align) - 1)))
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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/*
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* Minimum IO TLB size to bother booting with. Systems with mainly
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* 64bit capable cards will only lightly use the swiotlb. If we can't
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* allocate a contiguous 1MB, we're probably in trouble anyway.
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*/
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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enum swiotlb_force swiotlb_force;
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/*
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* Used to do a quick range check in swiotlb_tbl_unmap_single and
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* swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
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* API.
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*/
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static phys_addr_t io_tlb_start, io_tlb_end;
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/*
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* The number of IO TLB blocks (in groups of 64) between io_tlb_start and
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* io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
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*/
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static unsigned long io_tlb_nslabs;
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/*
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* When the IOMMU overflows we return a fallback buffer. This sets the size.
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*/
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static unsigned long io_tlb_overflow = 32*1024;
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static phys_addr_t io_tlb_overflow_buffer;
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/*
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* This is a free list describing the number of free entries available from
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* each index
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*/
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static unsigned int *io_tlb_list;
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static unsigned int io_tlb_index;
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/*
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* Max segment that we can provide which (if pages are contingous) will
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* not be bounced (unless SWIOTLB_FORCE is set).
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*/
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unsigned int max_segment;
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/*
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* We need to save away the original address corresponding to a mapped entry
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* for the sync operations.
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*/
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#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
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static phys_addr_t *io_tlb_orig_addr;
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/*
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* Protect the above data structures in the map and unmap calls
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*/
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static DEFINE_SPINLOCK(io_tlb_lock);
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static int late_alloc;
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static int __init
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setup_io_tlb_npages(char *str)
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{
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if (isdigit(*str)) {
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io_tlb_nslabs = simple_strtoul(str, &str, 0);
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/* avoid tail segment of size < IO_TLB_SEGSIZE */
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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if (*str == ',')
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++str;
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if (!strcmp(str, "force")) {
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swiotlb_force = SWIOTLB_FORCE;
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} else if (!strcmp(str, "noforce")) {
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swiotlb_force = SWIOTLB_NO_FORCE;
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io_tlb_nslabs = 1;
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}
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return 0;
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}
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early_param("swiotlb", setup_io_tlb_npages);
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/* make io_tlb_overflow tunable too? */
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unsigned long swiotlb_nr_tbl(void)
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{
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return io_tlb_nslabs;
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}
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EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
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unsigned int swiotlb_max_segment(void)
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{
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return max_segment;
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}
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EXPORT_SYMBOL_GPL(swiotlb_max_segment);
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void swiotlb_set_max_segment(unsigned int val)
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{
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if (swiotlb_force == SWIOTLB_FORCE)
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max_segment = 1;
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else
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max_segment = rounddown(val, PAGE_SIZE);
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}
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/* default to 64MB */
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#define IO_TLB_DEFAULT_SIZE (64UL<<20)
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unsigned long swiotlb_size_or_default(void)
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{
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unsigned long size;
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size = io_tlb_nslabs << IO_TLB_SHIFT;
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return size ? size : (IO_TLB_DEFAULT_SIZE);
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}
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void __weak swiotlb_set_mem_attributes(void *vaddr, unsigned long size) { }
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/* For swiotlb, clear memory encryption mask from dma addresses */
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static dma_addr_t swiotlb_phys_to_dma(struct device *hwdev,
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phys_addr_t address)
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{
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return __sme_clr(phys_to_dma(hwdev, address));
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}
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/* Note that this doesn't work with highmem page */
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static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
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volatile void *address)
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{
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return phys_to_dma(hwdev, virt_to_phys(address));
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}
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static bool no_iotlb_memory;
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void swiotlb_print_info(void)
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{
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unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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unsigned char *vstart, *vend;
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if (no_iotlb_memory) {
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pr_warn("software IO TLB: No low mem\n");
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return;
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}
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vstart = phys_to_virt(io_tlb_start);
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vend = phys_to_virt(io_tlb_end);
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printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
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(unsigned long long)io_tlb_start,
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(unsigned long long)io_tlb_end,
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bytes >> 20, vstart, vend - 1);
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}
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/*
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* Early SWIOTLB allocation may be too early to allow an architecture to
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* perform the desired operations. This function allows the architecture to
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* call SWIOTLB when the operations are possible. It needs to be called
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* before the SWIOTLB memory is used.
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*/
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void __init swiotlb_update_mem_attributes(void)
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{
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void *vaddr;
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unsigned long bytes;
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if (no_iotlb_memory || late_alloc)
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return;
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vaddr = phys_to_virt(io_tlb_start);
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bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
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swiotlb_set_mem_attributes(vaddr, bytes);
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memset(vaddr, 0, bytes);
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vaddr = phys_to_virt(io_tlb_overflow_buffer);
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bytes = PAGE_ALIGN(io_tlb_overflow);
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swiotlb_set_mem_attributes(vaddr, bytes);
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memset(vaddr, 0, bytes);
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}
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int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
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{
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void *v_overflow_buffer;
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unsigned long i, bytes;
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bytes = nslabs << IO_TLB_SHIFT;
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io_tlb_nslabs = nslabs;
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io_tlb_start = __pa(tlb);
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io_tlb_end = io_tlb_start + bytes;
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/*
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* Get the overflow emergency buffer
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*/
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v_overflow_buffer = memblock_virt_alloc_low_nopanic(
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PAGE_ALIGN(io_tlb_overflow),
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PAGE_SIZE);
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if (!v_overflow_buffer)
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return -ENOMEM;
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io_tlb_overflow_buffer = __pa(v_overflow_buffer);
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = memblock_virt_alloc(
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PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
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PAGE_SIZE);
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io_tlb_orig_addr = memblock_virt_alloc(
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PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
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PAGE_SIZE);
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for (i = 0; i < io_tlb_nslabs; i++) {
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
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}
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io_tlb_index = 0;
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if (verbose)
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swiotlb_print_info();
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swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
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return 0;
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}
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/*
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* Statically reserve bounce buffer space and initialize bounce buffer data
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* structures for the software IO TLB used to implement the DMA API.
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*/
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void __init
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swiotlb_init(int verbose)
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{
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size_t default_size = IO_TLB_DEFAULT_SIZE;
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unsigned char *vstart;
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unsigned long bytes;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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/* Get IO TLB memory from the low pages */
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vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
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if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
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return;
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if (io_tlb_start)
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memblock_free_early(io_tlb_start,
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PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
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pr_warn("Cannot allocate SWIOTLB buffer");
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no_iotlb_memory = true;
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}
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/*
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* Systems with larger DMA zones (those that don't support ISA) can
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* initialize the swiotlb later using the slab allocator if needed.
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* This should be just like above, but with some error catching.
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*/
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int
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swiotlb_late_init_with_default_size(size_t default_size)
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{
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unsigned long bytes, req_nslabs = io_tlb_nslabs;
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unsigned char *vstart = NULL;
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unsigned int order;
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int rc = 0;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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/*
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* Get IO TLB memory from the low pages
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*/
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order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
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order);
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if (vstart)
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break;
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order--;
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}
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if (!vstart) {
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io_tlb_nslabs = req_nslabs;
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return -ENOMEM;
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}
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if (order != get_order(bytes)) {
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printk(KERN_WARNING "Warning: only able to allocate %ld MB "
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"for software IO TLB\n", (PAGE_SIZE << order) >> 20);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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}
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rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
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if (rc)
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free_pages((unsigned long)vstart, order);
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return rc;
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}
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int
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swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
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{
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unsigned long i, bytes;
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unsigned char *v_overflow_buffer;
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bytes = nslabs << IO_TLB_SHIFT;
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io_tlb_nslabs = nslabs;
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io_tlb_start = virt_to_phys(tlb);
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io_tlb_end = io_tlb_start + bytes;
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swiotlb_set_mem_attributes(tlb, bytes);
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memset(tlb, 0, bytes);
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/*
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* Get the overflow emergency buffer
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*/
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v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
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get_order(io_tlb_overflow));
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if (!v_overflow_buffer)
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goto cleanup2;
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swiotlb_set_mem_attributes(v_overflow_buffer, io_tlb_overflow);
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memset(v_overflow_buffer, 0, io_tlb_overflow);
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io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs * sizeof(int)));
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if (!io_tlb_list)
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goto cleanup3;
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io_tlb_orig_addr = (phys_addr_t *)
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__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs *
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sizeof(phys_addr_t)));
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if (!io_tlb_orig_addr)
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goto cleanup4;
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for (i = 0; i < io_tlb_nslabs; i++) {
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
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}
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io_tlb_index = 0;
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swiotlb_print_info();
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late_alloc = 1;
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swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
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return 0;
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cleanup4:
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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io_tlb_list = NULL;
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cleanup3:
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free_pages((unsigned long)v_overflow_buffer,
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get_order(io_tlb_overflow));
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io_tlb_overflow_buffer = 0;
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cleanup2:
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io_tlb_end = 0;
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io_tlb_start = 0;
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io_tlb_nslabs = 0;
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max_segment = 0;
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return -ENOMEM;
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}
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void __init swiotlb_free(void)
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{
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if (!io_tlb_orig_addr)
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return;
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if (late_alloc) {
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free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
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get_order(io_tlb_overflow));
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free_pages((unsigned long)io_tlb_orig_addr,
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get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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free_pages((unsigned long)phys_to_virt(io_tlb_start),
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get_order(io_tlb_nslabs << IO_TLB_SHIFT));
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} else {
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memblock_free_late(io_tlb_overflow_buffer,
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PAGE_ALIGN(io_tlb_overflow));
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memblock_free_late(__pa(io_tlb_orig_addr),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
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memblock_free_late(__pa(io_tlb_list),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
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memblock_free_late(io_tlb_start,
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PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
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}
|
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io_tlb_nslabs = 0;
|
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max_segment = 0;
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}
|
|
|
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int is_swiotlb_buffer(phys_addr_t paddr)
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{
|
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return paddr >= io_tlb_start && paddr < io_tlb_end;
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}
|
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|
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/*
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* Bounce: copy the swiotlb buffer back to the original dma location
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*/
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static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
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size_t size, enum dma_data_direction dir)
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{
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unsigned long pfn = PFN_DOWN(orig_addr);
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unsigned char *vaddr = phys_to_virt(tlb_addr);
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|
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if (PageHighMem(pfn_to_page(pfn))) {
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/* The buffer does not have a mapping. Map it in and copy */
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unsigned int offset = orig_addr & ~PAGE_MASK;
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char *buffer;
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unsigned int sz = 0;
|
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unsigned long flags;
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|
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while (size) {
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sz = min_t(size_t, PAGE_SIZE - offset, size);
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|
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local_irq_save(flags);
|
|
buffer = kmap_atomic(pfn_to_page(pfn));
|
|
if (dir == DMA_TO_DEVICE)
|
|
memcpy(vaddr, buffer + offset, sz);
|
|
else
|
|
memcpy(buffer + offset, vaddr, sz);
|
|
kunmap_atomic(buffer);
|
|
local_irq_restore(flags);
|
|
|
|
size -= sz;
|
|
pfn++;
|
|
vaddr += sz;
|
|
offset = 0;
|
|
}
|
|
} else if (dir == DMA_TO_DEVICE) {
|
|
memcpy(vaddr, phys_to_virt(orig_addr), size);
|
|
} else {
|
|
memcpy(phys_to_virt(orig_addr), vaddr, size);
|
|
}
|
|
}
|
|
|
|
phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
|
|
dma_addr_t tbl_dma_addr,
|
|
phys_addr_t orig_addr, size_t size,
|
|
enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
unsigned long flags;
|
|
phys_addr_t tlb_addr;
|
|
unsigned int nslots, stride, index, wrap;
|
|
int i;
|
|
unsigned long mask;
|
|
unsigned long offset_slots;
|
|
unsigned long max_slots;
|
|
|
|
if (no_iotlb_memory)
|
|
panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
|
|
|
|
if (mem_encrypt_active())
|
|
pr_warn_once("%s is active and system is using DMA bounce buffers\n",
|
|
sme_active() ? "SME" : "SEV");
|
|
|
|
mask = dma_get_seg_boundary(hwdev);
|
|
|
|
tbl_dma_addr &= mask;
|
|
|
|
offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
|
|
/*
|
|
* Carefully handle integer overflow which can occur when mask == ~0UL.
|
|
*/
|
|
max_slots = mask + 1
|
|
? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
|
|
: 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
|
|
|
|
/*
|
|
* For mappings greater than or equal to a page, we limit the stride
|
|
* (and hence alignment) to a page size.
|
|
*/
|
|
nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
if (size >= PAGE_SIZE)
|
|
stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
|
|
else
|
|
stride = 1;
|
|
|
|
BUG_ON(!nslots);
|
|
|
|
/*
|
|
* Find suitable number of IO TLB entries size that will fit this
|
|
* request and allocate a buffer from that IO TLB pool.
|
|
*/
|
|
spin_lock_irqsave(&io_tlb_lock, flags);
|
|
index = ALIGN(io_tlb_index, stride);
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
wrap = index;
|
|
|
|
do {
|
|
while (iommu_is_span_boundary(index, nslots, offset_slots,
|
|
max_slots)) {
|
|
index += stride;
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
if (index == wrap)
|
|
goto not_found;
|
|
}
|
|
|
|
/*
|
|
* If we find a slot that indicates we have 'nslots' number of
|
|
* contiguous buffers, we allocate the buffers from that slot
|
|
* and mark the entries as '0' indicating unavailable.
|
|
*/
|
|
if (io_tlb_list[index] >= nslots) {
|
|
int count = 0;
|
|
|
|
for (i = index; i < (int) (index + nslots); i++)
|
|
io_tlb_list[i] = 0;
|
|
for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
|
|
io_tlb_list[i] = ++count;
|
|
tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
|
|
|
|
/*
|
|
* Update the indices to avoid searching in the next
|
|
* round.
|
|
*/
|
|
io_tlb_index = ((index + nslots) < io_tlb_nslabs
|
|
? (index + nslots) : 0);
|
|
|
|
goto found;
|
|
}
|
|
index += stride;
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
} while (index != wrap);
|
|
|
|
not_found:
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
if (printk_ratelimit())
|
|
dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
|
|
return SWIOTLB_MAP_ERROR;
|
|
found:
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
|
|
/*
|
|
* Save away the mapping from the original address to the DMA address.
|
|
* This is needed when we sync the memory. Then we sync the buffer if
|
|
* needed.
|
|
*/
|
|
for (i = 0; i < nslots; i++)
|
|
io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
|
|
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
|
(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
|
|
|
|
return tlb_addr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
|
|
|
|
/*
|
|
* Allocates bounce buffer and returns its kernel virtual address.
|
|
*/
|
|
|
|
static phys_addr_t
|
|
map_single(struct device *hwdev, phys_addr_t phys, size_t size,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
dma_addr_t start_dma_addr;
|
|
|
|
if (swiotlb_force == SWIOTLB_NO_FORCE) {
|
|
dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
|
|
&phys);
|
|
return SWIOTLB_MAP_ERROR;
|
|
}
|
|
|
|
start_dma_addr = swiotlb_phys_to_dma(hwdev, io_tlb_start);
|
|
return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size,
|
|
dir, attrs);
|
|
}
|
|
|
|
/*
|
|
* dma_addr is the kernel virtual address of the bounce buffer to unmap.
|
|
*/
|
|
void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
unsigned long flags;
|
|
int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t orig_addr = io_tlb_orig_addr[index];
|
|
|
|
/*
|
|
* First, sync the memory before unmapping the entry
|
|
*/
|
|
if (orig_addr != INVALID_PHYS_ADDR &&
|
|
!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
|
((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
|
|
swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
|
|
|
|
/*
|
|
* Return the buffer to the free list by setting the corresponding
|
|
* entries to indicate the number of contiguous entries available.
|
|
* While returning the entries to the free list, we merge the entries
|
|
* with slots below and above the pool being returned.
|
|
*/
|
|
spin_lock_irqsave(&io_tlb_lock, flags);
|
|
{
|
|
count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
|
|
io_tlb_list[index + nslots] : 0);
|
|
/*
|
|
* Step 1: return the slots to the free list, merging the
|
|
* slots with superceeding slots
|
|
*/
|
|
for (i = index + nslots - 1; i >= index; i--) {
|
|
io_tlb_list[i] = ++count;
|
|
io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
|
|
}
|
|
/*
|
|
* Step 2: merge the returned slots with the preceding slots,
|
|
* if available (non zero)
|
|
*/
|
|
for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
|
|
io_tlb_list[i] = ++count;
|
|
}
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
|
|
|
|
void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t orig_addr = io_tlb_orig_addr[index];
|
|
|
|
if (orig_addr == INVALID_PHYS_ADDR)
|
|
return;
|
|
orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
|
|
|
|
switch (target) {
|
|
case SYNC_FOR_CPU:
|
|
if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr,
|
|
size, DMA_FROM_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_TO_DEVICE);
|
|
break;
|
|
case SYNC_FOR_DEVICE:
|
|
if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr,
|
|
size, DMA_TO_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_FROM_DEVICE);
|
|
break;
|
|
default:
|
|
BUG();
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
|
|
|
|
void *
|
|
swiotlb_alloc_coherent(struct device *hwdev, size_t size,
|
|
dma_addr_t *dma_handle, gfp_t flags)
|
|
{
|
|
dma_addr_t dev_addr;
|
|
void *ret;
|
|
int order = get_order(size);
|
|
u64 dma_mask = DMA_BIT_MASK(32);
|
|
|
|
if (hwdev && hwdev->coherent_dma_mask)
|
|
dma_mask = hwdev->coherent_dma_mask;
|
|
|
|
ret = (void *)__get_free_pages(flags, order);
|
|
if (ret) {
|
|
dev_addr = swiotlb_virt_to_bus(hwdev, ret);
|
|
if (dev_addr + size - 1 > dma_mask) {
|
|
/*
|
|
* The allocated memory isn't reachable by the device.
|
|
*/
|
|
free_pages((unsigned long) ret, order);
|
|
ret = NULL;
|
|
}
|
|
}
|
|
if (!ret) {
|
|
/*
|
|
* We are either out of memory or the device can't DMA to
|
|
* GFP_DMA memory; fall back on map_single(), which
|
|
* will grab memory from the lowest available address range.
|
|
*/
|
|
phys_addr_t paddr = map_single(hwdev, 0, size,
|
|
DMA_FROM_DEVICE, 0);
|
|
if (paddr == SWIOTLB_MAP_ERROR)
|
|
goto err_warn;
|
|
|
|
ret = phys_to_virt(paddr);
|
|
dev_addr = swiotlb_phys_to_dma(hwdev, paddr);
|
|
|
|
/* Confirm address can be DMA'd by device */
|
|
if (dev_addr + size - 1 > dma_mask) {
|
|
printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
|
|
(unsigned long long)dma_mask,
|
|
(unsigned long long)dev_addr);
|
|
|
|
/*
|
|
* DMA_TO_DEVICE to avoid memcpy in unmap_single.
|
|
* The DMA_ATTR_SKIP_CPU_SYNC is optional.
|
|
*/
|
|
swiotlb_tbl_unmap_single(hwdev, paddr,
|
|
size, DMA_TO_DEVICE,
|
|
DMA_ATTR_SKIP_CPU_SYNC);
|
|
goto err_warn;
|
|
}
|
|
}
|
|
|
|
*dma_handle = dev_addr;
|
|
memset(ret, 0, size);
|
|
|
|
return ret;
|
|
|
|
err_warn:
|
|
pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
|
|
dev_name(hwdev), size);
|
|
dump_stack();
|
|
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_alloc_coherent);
|
|
|
|
void
|
|
swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
|
|
dma_addr_t dev_addr)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
WARN_ON(irqs_disabled());
|
|
if (!is_swiotlb_buffer(paddr))
|
|
free_pages((unsigned long)vaddr, get_order(size));
|
|
else
|
|
/*
|
|
* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
|
|
* DMA_ATTR_SKIP_CPU_SYNC is optional.
|
|
*/
|
|
swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE,
|
|
DMA_ATTR_SKIP_CPU_SYNC);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_free_coherent);
|
|
|
|
static void
|
|
swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
|
|
int do_panic)
|
|
{
|
|
if (swiotlb_force == SWIOTLB_NO_FORCE)
|
|
return;
|
|
|
|
/*
|
|
* Ran out of IOMMU space for this operation. This is very bad.
|
|
* Unfortunately the drivers cannot handle this operation properly.
|
|
* unless they check for dma_mapping_error (most don't)
|
|
* When the mapping is small enough return a static buffer to limit
|
|
* the damage, or panic when the transfer is too big.
|
|
*/
|
|
dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n",
|
|
size);
|
|
|
|
if (size <= io_tlb_overflow || !do_panic)
|
|
return;
|
|
|
|
if (dir == DMA_BIDIRECTIONAL)
|
|
panic("DMA: Random memory could be DMA accessed\n");
|
|
if (dir == DMA_FROM_DEVICE)
|
|
panic("DMA: Random memory could be DMA written\n");
|
|
if (dir == DMA_TO_DEVICE)
|
|
panic("DMA: Random memory could be DMA read\n");
|
|
}
|
|
|
|
/*
|
|
* Map a single buffer of the indicated size for DMA in streaming mode. The
|
|
* physical address to use is returned.
|
|
*
|
|
* Once the device is given the dma address, the device owns this memory until
|
|
* either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
|
|
*/
|
|
dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
|
|
unsigned long offset, size_t size,
|
|
enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
phys_addr_t map, phys = page_to_phys(page) + offset;
|
|
dma_addr_t dev_addr = phys_to_dma(dev, phys);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
/*
|
|
* If the address happens to be in the device's DMA window,
|
|
* we can safely return the device addr and not worry about bounce
|
|
* buffering it.
|
|
*/
|
|
if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
|
|
return dev_addr;
|
|
|
|
trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
|
|
|
|
/* Oh well, have to allocate and map a bounce buffer. */
|
|
map = map_single(dev, phys, size, dir, attrs);
|
|
if (map == SWIOTLB_MAP_ERROR) {
|
|
swiotlb_full(dev, size, dir, 1);
|
|
return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
|
|
}
|
|
|
|
dev_addr = swiotlb_phys_to_dma(dev, map);
|
|
|
|
/* Ensure that the address returned is DMA'ble */
|
|
if (dma_capable(dev, dev_addr, size))
|
|
return dev_addr;
|
|
|
|
attrs |= DMA_ATTR_SKIP_CPU_SYNC;
|
|
swiotlb_tbl_unmap_single(dev, map, size, dir, attrs);
|
|
|
|
return swiotlb_phys_to_dma(dev, io_tlb_overflow_buffer);
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_map_page);
|
|
|
|
/*
|
|
* Unmap a single streaming mode DMA translation. The dma_addr and size must
|
|
* match what was provided for in a previous swiotlb_map_page call. All
|
|
* other usages are undefined.
|
|
*
|
|
* After this call, reads by the cpu to the buffer are guaranteed to see
|
|
* whatever the device wrote there.
|
|
*/
|
|
static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
if (is_swiotlb_buffer(paddr)) {
|
|
swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
|
|
return;
|
|
}
|
|
|
|
if (dir != DMA_FROM_DEVICE)
|
|
return;
|
|
|
|
/*
|
|
* phys_to_virt doesn't work with hihgmem page but we could
|
|
* call dma_mark_clean() with hihgmem page here. However, we
|
|
* are fine since dma_mark_clean() is null on POWERPC. We can
|
|
* make dma_mark_clean() take a physical address if necessary.
|
|
*/
|
|
dma_mark_clean(phys_to_virt(paddr), size);
|
|
}
|
|
|
|
void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
unmap_single(hwdev, dev_addr, size, dir, attrs);
|
|
}
|
|
EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
|
|
|
|
/*
|
|
* Make physical memory consistent for a single streaming mode DMA translation
|
|
* after a transfer.
|
|
*
|
|
* If you perform a swiotlb_map_page() but wish to interrogate the buffer
|
|
* using the cpu, yet do not wish to teardown the dma mapping, you must
|
|
* call this function before doing so. At the next point you give the dma
|
|
* address back to the card, you must first perform a
|
|
* swiotlb_dma_sync_for_device, and then the device again owns the buffer
|
|
*/
|
|
static void
|
|
swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
if (is_swiotlb_buffer(paddr)) {
|
|
swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
|
|
return;
|
|
}
|
|
|
|
if (dir != DMA_FROM_DEVICE)
|
|
return;
|
|
|
|
dma_mark_clean(phys_to_virt(paddr), size);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
|
|
|
|
void
|
|
swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_single_for_device);
|
|
|
|
/*
|
|
* Map a set of buffers described by scatterlist in streaming mode for DMA.
|
|
* This is the scatter-gather version of the above swiotlb_map_page
|
|
* interface. Here the scatter gather list elements are each tagged with the
|
|
* appropriate dma address and length. They are obtained via
|
|
* sg_dma_{address,length}(SG).
|
|
*
|
|
* NOTE: An implementation may be able to use a smaller number of
|
|
* DMA address/length pairs than there are SG table elements.
|
|
* (for example via virtual mapping capabilities)
|
|
* The routine returns the number of addr/length pairs actually
|
|
* used, at most nents.
|
|
*
|
|
* Device ownership issues as mentioned above for swiotlb_map_page are the
|
|
* same here.
|
|
*/
|
|
int
|
|
swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for_each_sg(sgl, sg, nelems, i) {
|
|
phys_addr_t paddr = sg_phys(sg);
|
|
dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
|
|
|
|
if (swiotlb_force == SWIOTLB_FORCE ||
|
|
!dma_capable(hwdev, dev_addr, sg->length)) {
|
|
phys_addr_t map = map_single(hwdev, sg_phys(sg),
|
|
sg->length, dir, attrs);
|
|
if (map == SWIOTLB_MAP_ERROR) {
|
|
/* Don't panic here, we expect map_sg users
|
|
to do proper error handling. */
|
|
swiotlb_full(hwdev, sg->length, dir, 0);
|
|
attrs |= DMA_ATTR_SKIP_CPU_SYNC;
|
|
swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
|
|
attrs);
|
|
sg_dma_len(sgl) = 0;
|
|
return 0;
|
|
}
|
|
sg->dma_address = swiotlb_phys_to_dma(hwdev, map);
|
|
} else
|
|
sg->dma_address = dev_addr;
|
|
sg_dma_len(sg) = sg->length;
|
|
}
|
|
return nelems;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_map_sg_attrs);
|
|
|
|
/*
|
|
* Unmap a set of streaming mode DMA translations. Again, cpu read rules
|
|
* concerning calls here are the same as for swiotlb_unmap_page() above.
|
|
*/
|
|
void
|
|
swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
|
|
int nelems, enum dma_data_direction dir,
|
|
unsigned long attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
|
unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir,
|
|
attrs);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
|
|
|
|
/*
|
|
* Make physical memory consistent for a set of streaming mode DMA translations
|
|
* after a transfer.
|
|
*
|
|
* The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
|
|
* and usage.
|
|
*/
|
|
static void
|
|
swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
|
|
int nelems, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
|
swiotlb_sync_single(hwdev, sg->dma_address,
|
|
sg_dma_len(sg), dir, target);
|
|
}
|
|
|
|
void
|
|
swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
|
|
|
|
void
|
|
swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
|
|
|
|
int
|
|
swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
|
|
{
|
|
return (dma_addr == swiotlb_phys_to_dma(hwdev, io_tlb_overflow_buffer));
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_dma_mapping_error);
|
|
|
|
/*
|
|
* Return whether the given device DMA address mask can be supported
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask to
|
|
* this function.
|
|
*/
|
|
int
|
|
swiotlb_dma_supported(struct device *hwdev, u64 mask)
|
|
{
|
|
return swiotlb_phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
|
|
}
|
|
EXPORT_SYMBOL(swiotlb_dma_supported);
|