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The SWP instruction was deprecated in the ARMv6 architecture, superseded by the LDREX/STREX family of instructions for load-linked/store-conditional operations. The ARMv7 multiprocessing extensions mandate that SWP/SWPB instructions are treated as undefined from reset, with the ability to enable them through the System Control Register SW bit. This patch adds the alternative solution to emulate the SWP and SWPB instructions using LDREX/STREX sequences, and log statistics to /proc/cpu/swp_emulation. To correctly deal with copy-on-write, it also modifies cpu_v7_set_pte_ext to change the mappings to priviliged RO when user RO. Signed-off-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
28 lines
1.2 KiB
Plaintext
28 lines
1.2 KiB
Plaintext
Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
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---------------------------------------------------------------------
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ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
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moving to the load-locked/store-conditional instructions LDREX and STREX.
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ARMv7 multiprocessing extensions introduce the ability to disable these
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instructions, triggering an undefined instruction exception when executed.
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Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
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sequence. If a memory access fault (an abort) occurs, a segmentation fault is
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signalled to the triggering process.
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/proc/cpu/swp_emulation holds some statistics/information, including the PID of
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the last process to trigger the emulation to be invocated. For example:
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---
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Emulated SWP: 12
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Emulated SWPB: 0
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Aborted SWP{B}: 1
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Last process: 314
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---
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NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external
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transaction monitoring block called a global monitor to maintain update
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atomicity. If your system does not implement a global monitor, this option can
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cause programs that perform SWP operations to uncached memory to deadlock, as
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the STREX operation will always fail.
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