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7d4163c831
When Linux runs as the root partition, the setup required for TSC page is different. Luckily Linux also has access to the MSR based clocksource. We can just disable the TSC page clocksource if Linux is the root partition. Signed-off-by: Wei Liu <wei.liu@kernel.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Pavel Tatashin <pasha.tatashin@soleen.com> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/20210203150435.27941-5-wei.liu@kernel.org
479 lines
13 KiB
C
479 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Clocksource driver for the synthetic counter and timers
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* provided by the Hyper-V hypervisor to guest VMs, as described
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* in the Hyper-V Top Level Functional Spec (TLFS). This driver
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* is instruction set architecture independent.
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*
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* Copyright (C) 2019, Microsoft, Inc.
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*
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* Author: Michael Kelley <mikelley@microsoft.com>
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*/
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#include <linux/percpu.h>
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#include <linux/cpumask.h>
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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#include <linux/sched_clock.h>
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#include <linux/mm.h>
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#include <linux/cpuhotplug.h>
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#include <clocksource/hyperv_timer.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/mshyperv.h>
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static struct clock_event_device __percpu *hv_clock_event;
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static u64 hv_sched_clock_offset __ro_after_init;
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/*
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* If false, we're using the old mechanism for stimer0 interrupts
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* where it sends a VMbus message when it expires. The old
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* mechanism is used when running on older versions of Hyper-V
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* that don't support Direct Mode. While Hyper-V provides
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* four stimer's per CPU, Linux uses only stimer0.
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*
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* Because Direct Mode does not require processing a VMbus
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* message, stimer interrupts can be enabled earlier in the
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* process of booting a CPU, and consistent with when timer
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* interrupts are enabled for other clocksource drivers.
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* However, for legacy versions of Hyper-V when Direct Mode
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* is not enabled, setting up stimer interrupts must be
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* delayed until VMbus is initialized and can process the
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* interrupt message.
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*/
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static bool direct_mode_enabled;
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static int stimer0_irq;
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static int stimer0_vector;
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static int stimer0_message_sint;
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/*
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* ISR for when stimer0 is operating in Direct Mode. Direct Mode
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* does not use VMbus or any VMbus messages, so process here and not
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* in the VMbus driver code.
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*/
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void hv_stimer0_isr(void)
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{
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struct clock_event_device *ce;
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ce = this_cpu_ptr(hv_clock_event);
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ce->event_handler(ce);
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}
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EXPORT_SYMBOL_GPL(hv_stimer0_isr);
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static int hv_ce_set_next_event(unsigned long delta,
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struct clock_event_device *evt)
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{
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u64 current_tick;
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current_tick = hv_read_reference_counter();
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current_tick += delta;
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hv_init_timer(0, current_tick);
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return 0;
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}
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static int hv_ce_shutdown(struct clock_event_device *evt)
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{
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hv_init_timer(0, 0);
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hv_init_timer_config(0, 0);
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if (direct_mode_enabled)
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hv_disable_stimer0_percpu_irq(stimer0_irq);
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return 0;
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}
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static int hv_ce_set_oneshot(struct clock_event_device *evt)
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{
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union hv_stimer_config timer_cfg;
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timer_cfg.as_uint64 = 0;
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timer_cfg.enable = 1;
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timer_cfg.auto_enable = 1;
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if (direct_mode_enabled) {
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/*
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* When it expires, the timer will directly interrupt
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* on the specified hardware vector/IRQ.
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*/
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timer_cfg.direct_mode = 1;
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timer_cfg.apic_vector = stimer0_vector;
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hv_enable_stimer0_percpu_irq(stimer0_irq);
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} else {
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/*
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* When it expires, the timer will generate a VMbus message,
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* to be handled by the normal VMbus interrupt handler.
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*/
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timer_cfg.direct_mode = 0;
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timer_cfg.sintx = stimer0_message_sint;
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}
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hv_init_timer_config(0, timer_cfg.as_uint64);
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return 0;
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}
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/*
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* hv_stimer_init - Per-cpu initialization of the clockevent
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*/
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static int hv_stimer_init(unsigned int cpu)
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{
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struct clock_event_device *ce;
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if (!hv_clock_event)
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return 0;
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ce = per_cpu_ptr(hv_clock_event, cpu);
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ce->name = "Hyper-V clockevent";
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ce->features = CLOCK_EVT_FEAT_ONESHOT;
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ce->cpumask = cpumask_of(cpu);
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ce->rating = 1000;
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ce->set_state_shutdown = hv_ce_shutdown;
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ce->set_state_oneshot = hv_ce_set_oneshot;
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ce->set_next_event = hv_ce_set_next_event;
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clockevents_config_and_register(ce,
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HV_CLOCK_HZ,
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HV_MIN_DELTA_TICKS,
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HV_MAX_MAX_DELTA_TICKS);
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return 0;
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}
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/*
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* hv_stimer_cleanup - Per-cpu cleanup of the clockevent
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*/
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int hv_stimer_cleanup(unsigned int cpu)
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{
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struct clock_event_device *ce;
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if (!hv_clock_event)
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return 0;
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/*
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* In the legacy case where Direct Mode is not enabled
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* (which can only be on x86/64), stimer cleanup happens
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* relatively early in the CPU offlining process. We
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* must unbind the stimer-based clockevent device so
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* that the LAPIC timer can take over until clockevents
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* are no longer needed in the offlining process. Note
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* that clockevents_unbind_device() eventually calls
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* hv_ce_shutdown().
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*
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* The unbind should not be done when Direct Mode is
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* enabled because we may be on an architecture where
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* there are no other clockevent devices to fallback to.
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*/
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ce = per_cpu_ptr(hv_clock_event, cpu);
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if (direct_mode_enabled)
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hv_ce_shutdown(ce);
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else
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clockevents_unbind_device(ce, cpu);
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return 0;
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}
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EXPORT_SYMBOL_GPL(hv_stimer_cleanup);
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/* hv_stimer_alloc - Global initialization of the clockevent and stimer0 */
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int hv_stimer_alloc(void)
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{
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int ret = 0;
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/*
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* Synthetic timers are always available except on old versions of
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* Hyper-V on x86. In that case, return as error as Linux will use a
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* clockevent based on emulated LAPIC timer hardware.
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*/
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if (!(ms_hyperv.features & HV_MSR_SYNTIMER_AVAILABLE))
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return -EINVAL;
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hv_clock_event = alloc_percpu(struct clock_event_device);
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if (!hv_clock_event)
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return -ENOMEM;
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direct_mode_enabled = ms_hyperv.misc_features &
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HV_STIMER_DIRECT_MODE_AVAILABLE;
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if (direct_mode_enabled) {
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ret = hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector,
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hv_stimer0_isr);
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if (ret)
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goto free_percpu;
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/*
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* Since we are in Direct Mode, stimer initialization
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* can be done now with a CPUHP value in the same range
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* as other clockevent devices.
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*/
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ret = cpuhp_setup_state(CPUHP_AP_HYPERV_TIMER_STARTING,
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"clockevents/hyperv/stimer:starting",
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hv_stimer_init, hv_stimer_cleanup);
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if (ret < 0)
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goto free_stimer0_irq;
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}
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return ret;
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free_stimer0_irq:
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hv_remove_stimer0_irq(stimer0_irq);
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stimer0_irq = 0;
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free_percpu:
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free_percpu(hv_clock_event);
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hv_clock_event = NULL;
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return ret;
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}
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EXPORT_SYMBOL_GPL(hv_stimer_alloc);
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/*
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* hv_stimer_legacy_init -- Called from the VMbus driver to handle
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* the case when Direct Mode is not enabled, and the stimer
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* must be initialized late in the CPU onlining process.
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*
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*/
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void hv_stimer_legacy_init(unsigned int cpu, int sint)
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{
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if (direct_mode_enabled)
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return;
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/*
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* This function gets called by each vCPU, so setting the
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* global stimer_message_sint value each time is conceptually
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* not ideal, but the value passed in is always the same and
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* it avoids introducing yet another interface into this
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* clocksource driver just to set the sint in the legacy case.
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*/
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stimer0_message_sint = sint;
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(void)hv_stimer_init(cpu);
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}
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EXPORT_SYMBOL_GPL(hv_stimer_legacy_init);
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/*
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* hv_stimer_legacy_cleanup -- Called from the VMbus driver to
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* handle the case when Direct Mode is not enabled, and the
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* stimer must be cleaned up early in the CPU offlining
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* process.
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*/
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void hv_stimer_legacy_cleanup(unsigned int cpu)
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{
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if (direct_mode_enabled)
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return;
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(void)hv_stimer_cleanup(cpu);
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}
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EXPORT_SYMBOL_GPL(hv_stimer_legacy_cleanup);
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/* hv_stimer_free - Free global resources allocated by hv_stimer_alloc() */
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void hv_stimer_free(void)
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{
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if (!hv_clock_event)
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return;
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if (direct_mode_enabled) {
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cpuhp_remove_state(CPUHP_AP_HYPERV_TIMER_STARTING);
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hv_remove_stimer0_irq(stimer0_irq);
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stimer0_irq = 0;
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}
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free_percpu(hv_clock_event);
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hv_clock_event = NULL;
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}
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EXPORT_SYMBOL_GPL(hv_stimer_free);
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/*
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* Do a global cleanup of clockevents for the cases of kexec and
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* vmbus exit
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*/
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void hv_stimer_global_cleanup(void)
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{
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int cpu;
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/*
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* hv_stime_legacy_cleanup() will stop the stimer if Direct
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* Mode is not enabled, and fallback to the LAPIC timer.
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*/
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for_each_present_cpu(cpu) {
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hv_stimer_legacy_cleanup(cpu);
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}
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/*
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* If Direct Mode is enabled, the cpuhp teardown callback
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* (hv_stimer_cleanup) will be run on all CPUs to stop the
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* stimers.
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*/
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hv_stimer_free();
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}
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EXPORT_SYMBOL_GPL(hv_stimer_global_cleanup);
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/*
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* Code and definitions for the Hyper-V clocksources. Two
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* clocksources are defined: one that reads the Hyper-V defined MSR, and
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* the other that uses the TSC reference page feature as defined in the
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* TLFS. The MSR version is for compatibility with old versions of
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* Hyper-V and 32-bit x86. The TSC reference page version is preferred.
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*
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* The Hyper-V clocksource ratings of 250 are chosen to be below the
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* TSC clocksource rating of 300. In configurations where Hyper-V offers
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* an InvariantTSC, the TSC is not marked "unstable", so the TSC clocksource
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* is available and preferred. With the higher rating, it will be the
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* default. On older hardware and Hyper-V versions, the TSC is marked
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* "unstable", so no TSC clocksource is created and the selected Hyper-V
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* clocksource will be the default.
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*/
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u64 (*hv_read_reference_counter)(void);
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EXPORT_SYMBOL_GPL(hv_read_reference_counter);
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static union {
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struct ms_hyperv_tsc_page page;
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u8 reserved[PAGE_SIZE];
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} tsc_pg __aligned(PAGE_SIZE);
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struct ms_hyperv_tsc_page *hv_get_tsc_page(void)
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{
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return &tsc_pg.page;
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}
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EXPORT_SYMBOL_GPL(hv_get_tsc_page);
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static u64 notrace read_hv_clock_tsc(void)
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{
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u64 current_tick = hv_read_tsc_page(hv_get_tsc_page());
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if (current_tick == U64_MAX)
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hv_get_time_ref_count(current_tick);
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return current_tick;
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}
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static u64 notrace read_hv_clock_tsc_cs(struct clocksource *arg)
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{
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return read_hv_clock_tsc();
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}
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static u64 notrace read_hv_sched_clock_tsc(void)
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{
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return (read_hv_clock_tsc() - hv_sched_clock_offset) *
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(NSEC_PER_SEC / HV_CLOCK_HZ);
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}
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static void suspend_hv_clock_tsc(struct clocksource *arg)
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{
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u64 tsc_msr;
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/* Disable the TSC page */
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hv_get_reference_tsc(tsc_msr);
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tsc_msr &= ~BIT_ULL(0);
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hv_set_reference_tsc(tsc_msr);
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}
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static void resume_hv_clock_tsc(struct clocksource *arg)
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{
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phys_addr_t phys_addr = virt_to_phys(&tsc_pg);
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u64 tsc_msr;
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/* Re-enable the TSC page */
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hv_get_reference_tsc(tsc_msr);
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tsc_msr &= GENMASK_ULL(11, 0);
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tsc_msr |= BIT_ULL(0) | (u64)phys_addr;
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hv_set_reference_tsc(tsc_msr);
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}
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static int hv_cs_enable(struct clocksource *cs)
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{
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hv_enable_vdso_clocksource();
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return 0;
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}
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static struct clocksource hyperv_cs_tsc = {
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.name = "hyperv_clocksource_tsc_page",
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.rating = 250,
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.read = read_hv_clock_tsc_cs,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.suspend= suspend_hv_clock_tsc,
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.resume = resume_hv_clock_tsc,
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.enable = hv_cs_enable,
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};
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static u64 notrace read_hv_clock_msr(void)
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{
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u64 current_tick;
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/*
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* Read the partition counter to get the current tick count. This count
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* is set to 0 when the partition is created and is incremented in
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* 100 nanosecond units.
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*/
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hv_get_time_ref_count(current_tick);
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return current_tick;
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}
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static u64 notrace read_hv_clock_msr_cs(struct clocksource *arg)
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{
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return read_hv_clock_msr();
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}
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static u64 notrace read_hv_sched_clock_msr(void)
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{
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return (read_hv_clock_msr() - hv_sched_clock_offset) *
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(NSEC_PER_SEC / HV_CLOCK_HZ);
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}
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static struct clocksource hyperv_cs_msr = {
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.name = "hyperv_clocksource_msr",
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.rating = 250,
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.read = read_hv_clock_msr_cs,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static bool __init hv_init_tsc_clocksource(void)
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{
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u64 tsc_msr;
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phys_addr_t phys_addr;
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if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE))
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return false;
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if (hv_root_partition)
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return false;
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hv_read_reference_counter = read_hv_clock_tsc;
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phys_addr = virt_to_phys(hv_get_tsc_page());
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/*
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* The Hyper-V TLFS specifies to preserve the value of reserved
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* bits in registers. So read the existing value, preserve the
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* low order 12 bits, and add in the guest physical address
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* (which already has at least the low 12 bits set to zero since
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* it is page aligned). Also set the "enable" bit, which is bit 0.
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*/
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hv_get_reference_tsc(tsc_msr);
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tsc_msr &= GENMASK_ULL(11, 0);
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tsc_msr = tsc_msr | 0x1 | (u64)phys_addr;
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hv_set_reference_tsc(tsc_msr);
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hv_set_clocksource_vdso(hyperv_cs_tsc);
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clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100);
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hv_sched_clock_offset = hv_read_reference_counter();
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hv_setup_sched_clock(read_hv_sched_clock_tsc);
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return true;
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}
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void __init hv_init_clocksource(void)
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{
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/*
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* Try to set up the TSC page clocksource. If it succeeds, we're
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* done. Otherwise, set up the MSR clocksoruce. At least one of
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* these will always be available except on very old versions of
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* Hyper-V on x86. In that case we won't have a Hyper-V
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* clocksource, but Linux will still run with a clocksource based
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* on the emulated PIT or LAPIC timer.
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*/
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if (hv_init_tsc_clocksource())
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return;
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if (!(ms_hyperv.features & HV_MSR_TIME_REF_COUNT_AVAILABLE))
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return;
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hv_read_reference_counter = read_hv_clock_msr;
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clocksource_register_hz(&hyperv_cs_msr, NSEC_PER_SEC/100);
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hv_sched_clock_offset = hv_read_reference_counter();
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hv_setup_sched_clock(read_hv_sched_clock_msr);
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}
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EXPORT_SYMBOL_GPL(hv_init_clocksource);
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