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cb36ff785e
The content of SND_SOC_DAIFMT_FORMAT_MASK is a number, not a bitfield,
so the test to check if the format is i2s is wrong. Because of this the
clock setting may be wrong. For example, the sample clock gets inverted
in DSP B mode, when it should not.
Fix the lrclk invert helper function
Fixes: 1a11d88f49 ("ASoC: meson: add tdm formatter base driver")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*
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* Copyright (c) 2018 Baylibre SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#ifndef _MESON_AXG_TDM_H
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#define _MESON_AXG_TDM_H
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#include <linux/clk.h>
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#include <linux/regmap.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#define AXG_TDM_NUM_LANES 4
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#define AXG_TDM_CHANNEL_MAX 128
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#define AXG_TDM_RATES (SNDRV_PCM_RATE_5512 | \
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SNDRV_PCM_RATE_8000_192000)
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#define AXG_TDM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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struct axg_tdm_iface {
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struct clk *sclk;
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struct clk *lrclk;
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struct clk *mclk;
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unsigned long mclk_rate;
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/* format is common to all the DAIs of the iface */
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unsigned int fmt;
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unsigned int slots;
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unsigned int slot_width;
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/* For component wide symmetry */
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int rate;
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};
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static inline bool axg_tdm_lrclk_invert(unsigned int fmt)
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{
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return ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S) ^
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!!(fmt & (SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_NB_IF));
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}
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static inline bool axg_tdm_sclk_invert(unsigned int fmt)
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{
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return fmt & (SND_SOC_DAIFMT_IB_IF | SND_SOC_DAIFMT_IB_NF);
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}
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struct axg_tdm_stream {
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struct axg_tdm_iface *iface;
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struct list_head formatter_list;
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struct mutex lock;
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unsigned int channels;
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unsigned int width;
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unsigned int physical_width;
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u32 *mask;
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bool ready;
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};
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struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface);
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void axg_tdm_stream_free(struct axg_tdm_stream *ts);
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int axg_tdm_stream_start(struct axg_tdm_stream *ts);
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void axg_tdm_stream_stop(struct axg_tdm_stream *ts);
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static inline int axg_tdm_stream_reset(struct axg_tdm_stream *ts)
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{
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axg_tdm_stream_stop(ts);
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return axg_tdm_stream_start(ts);
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}
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int axg_tdm_set_tdm_slots(struct snd_soc_dai *dai, u32 *tx_mask,
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u32 *rx_mask, unsigned int slots,
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unsigned int slot_width);
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#endif /* _MESON_AXG_TDM_H */
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