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3b2663ca84
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6320/
217 lines
5.4 KiB
C
217 lines
5.4 KiB
C
/*
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* Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc.
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* All rights reserved.
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* Authors: Carsten Langgaard <carstenl@mips.com>
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* Maciej W. Rozycki <macro@mips.com>
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*
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* Copyright (C) 2009 Lemote Inc.
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* Author: Wu Zhangjin <wuzhangjin@gmail.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <loongson.h>
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#ifdef CONFIG_CS5536
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#include <cs5536/cs5536_pci.h>
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#include <cs5536/cs5536.h>
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#endif
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#define PCI_ACCESS_READ 0
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#define PCI_ACCESS_WRITE 1
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#define CFG_SPACE_REG(offset) \
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(void *)CKSEG1ADDR(LOONGSON_PCICFG_BASE | (offset))
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#define ID_SEL_BEGIN 11
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#define MAX_DEV_NUM (31 - ID_SEL_BEGIN)
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static int loongson_pcibios_config_access(unsigned char access_type,
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struct pci_bus *bus,
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unsigned int devfn, int where,
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u32 *data)
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{
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u32 busnum = bus->number;
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u32 addr, type;
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u32 dummy;
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void *addrp;
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int device = PCI_SLOT(devfn);
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int function = PCI_FUNC(devfn);
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int reg = where & ~3;
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if (busnum == 0) {
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/* board-specific part,currently,only fuloong2f,yeeloong2f
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* use CS5536, fuloong2e use via686b, gdium has no
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* south bridge
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*/
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#ifdef CONFIG_CS5536
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/* cs5536_pci_conf_read4/write4() will call _rdmsr/_wrmsr() to
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* access the regsters PCI_MSR_ADDR, PCI_MSR_DATA_LO,
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* PCI_MSR_DATA_HI, which is bigger than PCI_MSR_CTRL, so, it
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* will not go this branch, but the others. so, no calling dead
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* loop here.
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*/
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if ((PCI_IDSEL_CS5536 == device) && (reg < PCI_MSR_CTRL)) {
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switch (access_type) {
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case PCI_ACCESS_READ:
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*data = cs5536_pci_conf_read4(function, reg);
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break;
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case PCI_ACCESS_WRITE:
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cs5536_pci_conf_write4(function, reg, *data);
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break;
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}
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return 0;
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}
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#endif
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/* Type 0 configuration for onboard PCI bus */
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if (device > MAX_DEV_NUM)
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return -1;
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addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
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type = 0;
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} else {
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/* Type 1 configuration for offboard PCI bus */
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addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
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type = 0x10000;
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}
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/* Clear aborts */
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LOONGSON_PCICMD |= LOONGSON_PCICMD_MABORT_CLR | \
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LOONGSON_PCICMD_MTABORT_CLR;
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LOONGSON_PCIMAP_CFG = (addr >> 16) | type;
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/* Flush Bonito register block */
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dummy = LOONGSON_PCIMAP_CFG;
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mmiowb();
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addrp = CFG_SPACE_REG(addr & 0xffff);
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if (access_type == PCI_ACCESS_WRITE)
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writel(cpu_to_le32(*data), addrp);
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else
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*data = le32_to_cpu(readl(addrp));
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/* Detect Master/Target abort */
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if (LOONGSON_PCICMD & (LOONGSON_PCICMD_MABORT_CLR |
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LOONGSON_PCICMD_MTABORT_CLR)) {
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/* Error occurred */
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/* Clear bits */
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LOONGSON_PCICMD |= (LOONGSON_PCICMD_MABORT_CLR |
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LOONGSON_PCICMD_MTABORT_CLR);
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return -1;
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}
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return 0;
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}
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/*
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* We can't address 8 and 16 bit words directly. Instead we have to
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* read/write a 32bit word and mask/modify the data we actually want.
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*/
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static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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u32 data = 0;
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
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&data))
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return -1;
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if (size == 1)
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*val = (data >> ((where & 3) << 3)) & 0xff;
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else if (size == 2)
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*val = (data >> ((where & 3) << 3)) & 0xffff;
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else
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*val = data;
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return PCIBIOS_SUCCESSFUL;
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}
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static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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u32 data = 0;
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if ((size == 2) && (where & 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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else if ((size == 4) && (where & 3))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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if (size == 4)
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data = val;
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else {
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if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
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where, &data))
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return -1;
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if (size == 1)
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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else if (size == 2)
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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}
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if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
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&data))
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return -1;
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops loongson_pci_ops = {
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.read = loongson_pcibios_read,
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.write = loongson_pcibios_write
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};
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#ifdef CONFIG_CS5536
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DEFINE_RAW_SPINLOCK(msr_lock);
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void _rdmsr(u32 msr, u32 *hi, u32 *lo)
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{
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struct pci_bus bus = {
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.number = PCI_BUS_CS5536
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};
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u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
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unsigned long flags;
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raw_spin_lock_irqsave(&msr_lock, flags);
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loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
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loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
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loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
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raw_spin_unlock_irqrestore(&msr_lock, flags);
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}
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EXPORT_SYMBOL(_rdmsr);
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void _wrmsr(u32 msr, u32 hi, u32 lo)
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{
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struct pci_bus bus = {
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.number = PCI_BUS_CS5536
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};
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u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
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unsigned long flags;
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raw_spin_lock_irqsave(&msr_lock, flags);
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loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
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loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
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loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
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raw_spin_unlock_irqrestore(&msr_lock, flags);
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}
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EXPORT_SYMBOL(_wrmsr);
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#endif
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