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9caf1f2202
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC. This doesn't include low-power GPIOs as they're controlled separately via the Powerdown Controller (PDC) registers. The driver is instantiated by device tree and supports interrupts for all GPIOs. Changes in v4: - fix typos in DT bindings compatible properties - reference Documentation/devicetree/bindings/gpio/gpio.txt in gpio-ranges description in DT bindings - fix gpio-ranges examples in DT bindings (it must now have 3 cells) - gpio-tz1090: use of_property_read_u32 instead of of_get_property Changes in v3: - separated from irq-imgpdc and removed arch/metag changes to allow these patches to go upstream separately via the pinctrl[/gpio] trees (particularly the pinctrl drivers depend on the new pinconf DT bindings). - some s/unsigned/unsigned int/. - some s/unsigned int/bool/ and use of BIT(). - gpio-tz1090*: refer to <dt-bindings/gpio/gpio.h> and <dt-bindings/interrupt-controller/irq.h> flags in bindings. - gpio-tz1090*: move initcall from postcore to subsys. - gpio-tz1090: add REG_ prefix to some constants for consistency. - gpio-tz1090: add comment to explain tz1090_gpio_irq_next_edge cunningness. Changes in v2: - gpio-tz1090: remove references to Linux flags in dt bindings - gpio-tz1090: make use of BIT() from linux/bitops.h - gpio-tz1090: make register accessors inline to match pinctrl - gpio-tz1090: update gpio-ranges to use 3 cells after recent ABI breakage Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
89 lines
2.4 KiB
Plaintext
89 lines
2.4 KiB
Plaintext
ImgTec TZ1090 GPIO Controller
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Required properties:
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- compatible: Compatible property value should be "img,tz1090-gpio".
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- reg: Physical base address of the controller and length of memory mapped
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region.
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- #address-cells: Should be 1 (for bank subnodes)
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- #size-cells: Should be 0 (for bank subnodes)
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- Each bank of GPIOs should have a subnode to represent it.
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Bank subnode required properties:
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- reg: Index of bank in the range 0 to 2.
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- gpio-controller: Specifies that the node is a gpio controller.
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- #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
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nodes should have the following values.
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<[phandle of the gpio controller node]
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[gpio number within the gpio bank]
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[gpio flags]>
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Values for gpio specifier:
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- GPIO number: a value in the range 0 to 29.
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- GPIO flags: bit field of flags, as defined in <dt-bindings/gpio/gpio.h>.
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Only the following flags are supported:
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GPIO_ACTIVE_HIGH
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GPIO_ACTIVE_LOW
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Bank subnode optional properties:
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- gpio-ranges: Mapping to pin controller pins (as described in
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Documentation/devicetree/bindings/gpio/gpio.txt)
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- interrupts: Interrupt for the entire bank
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- interrupt-controller: Specifies that the node is an interrupt controller
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- #interrupt-cells: Should be 2. The syntax of the interrupt specifier used by
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client nodes should have the following values.
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<[phandle of the interurupt controller]
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[gpio number within the gpio bank]
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[irq flags]>
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Values for irq specifier:
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- GPIO number: a value in the range 0 to 29
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- IRQ flags: value to describe edge and level triggering, as defined in
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<dt-bindings/interrupt-controller/irq.h>. Only the following flags are
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supported:
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IRQ_TYPE_EDGE_RISING
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IRQ_TYPE_EDGE_FALLING
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IRQ_TYPE_EDGE_BOTH
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IRQ_TYPE_LEVEL_HIGH
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IRQ_TYPE_LEVEL_LOW
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Example:
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gpios: gpio-controller@02005800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "img,tz1090-gpio";
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reg = <0x02005800 0x90>;
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/* bank 0 with an interrupt */
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gpios0: bank@0 {
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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reg = <0>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 30>;
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interrupt-controller;
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};
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/* bank 2 without interrupt */
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gpios2: bank@2 {
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#gpio-cells = <2>;
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reg = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 60 30>;
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};
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};
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