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d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
135 lines
2.7 KiB
C
135 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/kernel/pj4-cp0.c
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*
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* PJ4 iWMMXt coprocessor context switching and handling
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*
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* Copyright (c) 2010 Marvell International Inc.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/thread_notify.h>
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#include <asm/cputype.h>
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static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
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{
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struct thread_info *thread = t;
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switch (cmd) {
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case THREAD_NOTIFY_FLUSH:
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/*
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* flush_thread() zeroes thread->fpstate, so no need
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* to do anything here.
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*
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* FALLTHROUGH: Ensure we don't try to overwrite our newly
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* initialised state information on the first fault.
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*/
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case THREAD_NOTIFY_EXIT:
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iwmmxt_task_release(thread);
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break;
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case THREAD_NOTIFY_SWITCH:
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iwmmxt_task_switch(thread);
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break;
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}
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return NOTIFY_DONE;
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}
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static struct notifier_block __maybe_unused iwmmxt_notifier_block = {
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.notifier_call = iwmmxt_do,
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};
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static u32 __init pj4_cp_access_read(void)
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{
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u32 value;
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__asm__ __volatile__ (
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"mrc p15, 0, %0, c1, c0, 2\n\t"
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: "=r" (value));
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return value;
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}
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static void __init pj4_cp_access_write(u32 value)
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{
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u32 temp;
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__asm__ __volatile__ (
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"mcr p15, 0, %1, c1, c0, 2\n\t"
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#ifdef CONFIG_THUMB2_KERNEL
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"isb\n\t"
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#else
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"mrc p15, 0, %0, c1, c0, 2\n\t"
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"mov %0, %0\n\t"
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"sub pc, pc, #4\n\t"
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#endif
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: "=r" (temp) : "r" (value));
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}
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static int __init pj4_get_iwmmxt_version(void)
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{
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u32 cp_access, wcid;
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cp_access = pj4_cp_access_read();
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pj4_cp_access_write(cp_access | 0xf);
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/* check if coprocessor 0 and 1 are available */
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if ((pj4_cp_access_read() & 0xf) != 0xf) {
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pj4_cp_access_write(cp_access);
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return -ENODEV;
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}
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/* read iWMMXt coprocessor id register p1, c0 */
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__asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid));
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pj4_cp_access_write(cp_access);
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/* iWMMXt v1 */
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if ((wcid & 0xffffff00) == 0x56051000)
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return 1;
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/* iWMMXt v2 */
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if ((wcid & 0xffffff00) == 0x56052000)
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return 2;
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return -EINVAL;
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}
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/*
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* Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
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* switch code handle iWMMXt context switching.
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*/
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static int __init pj4_cp0_init(void)
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{
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u32 __maybe_unused cp_access;
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int vers;
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if (!cpu_is_pj4())
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return 0;
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vers = pj4_get_iwmmxt_version();
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if (vers < 0)
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return 0;
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#ifndef CONFIG_IWMMXT
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pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n");
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#else
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cp_access = pj4_cp_access_read() & ~0xf;
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pj4_cp_access_write(cp_access);
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pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers);
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elf_hwcap |= HWCAP_IWMMXT;
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thread_register_notifier(&iwmmxt_notifier_block);
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#endif
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return 0;
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}
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late_initcall(pj4_cp0_init);
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