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b1f01e48df
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to memory-to-memory transfer through queue based descriptor management. There are only 3 physical channels inside CQDMA, while the driver is extended to support 32 virtual channels for multiple dma users to issue dma requests onto the CQDMA simultaneously. Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
27 lines
800 B
Plaintext
27 lines
800 B
Plaintext
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config MTK_HSDMA
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tristate "MediaTek High-Speed DMA controller support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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---help---
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Enable support for High-Speed DMA controller on MediaTek
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SoCs.
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This controller provides the channels which is dedicated to
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memory-to-memory transfer to offload from CPU through ring-
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based descriptor management.
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config MTK_CQDMA
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tristate "MediaTek Command-Queue DMA controller support"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for Command-Queue DMA controller on MediaTek
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SoCs.
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This controller provides the channels which is dedicated to
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memory-to-memory transfer to offload from CPU.
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