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https://github.com/edk2-porting/linux-next.git
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8b5690f884
Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
131 lines
2.8 KiB
C
131 lines
2.8 KiB
C
/*
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* DS1287 clockevent driver
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*
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* Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/mc146818rtc.h>
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#include <linux/irq.h>
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#include <asm/time.h>
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int ds1287_timer_state(void)
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{
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return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0;
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}
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int ds1287_set_base_clock(unsigned int hz)
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{
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u8 rate;
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switch (hz) {
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case 128:
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rate = 0x9;
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break;
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case 256:
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rate = 0x8;
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break;
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case 1024:
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rate = 0x6;
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break;
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default:
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return -EINVAL;
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}
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CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A);
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return 0;
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}
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static int ds1287_set_next_event(unsigned long delta,
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struct clock_event_device *evt)
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{
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return -EINVAL;
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}
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static void ds1287_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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u8 val;
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spin_lock(&rtc_lock);
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val = CMOS_READ(RTC_REG_B);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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val |= RTC_PIE;
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break;
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default:
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val &= ~RTC_PIE;
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break;
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}
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CMOS_WRITE(val, RTC_REG_B);
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spin_unlock(&rtc_lock);
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}
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static void ds1287_event_handler(struct clock_event_device *dev)
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{
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}
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static struct clock_event_device ds1287_clockevent = {
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.name = "ds1287",
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.set_next_event = ds1287_set_next_event,
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.set_mode = ds1287_set_mode,
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.event_handler = ds1287_event_handler,
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};
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static irqreturn_t ds1287_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd = &ds1287_clockevent;
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/* Ack the RTC interrupt. */
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CMOS_READ(RTC_REG_C);
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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static struct irqaction ds1287_irqaction = {
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.handler = ds1287_interrupt,
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.flags = IRQF_PERCPU | IRQF_TIMER,
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.name = "ds1287",
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};
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int __init ds1287_clockevent_init(int irq)
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{
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struct clock_event_device *cd;
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cd = &ds1287_clockevent;
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cd->rating = 100;
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cd->irq = irq;
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clockevent_set_clock(cd, 32768);
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cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
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cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
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cd->cpumask = cpumask_of(0);
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clockevents_register_device(&ds1287_clockevent);
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return setup_irq(irq, &ds1287_irqaction);
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}
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