Tobias Schramm 47e4dc4e63 clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audio ... Commit 46060be6d8 ("clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll") changed the audio pll on the Allwinner V3s and V3 SoCs to use sigma-delta modulation. In the process the declaration of fixed postdivider providing "pll-audio" was adjusted to provide the desired clock rates from the now sigma-delta modulated pll. However, while the divider used for calculations by the clock framework was adjusted the actual divider programmed into the hardware in sun8i_v3_v3s_ccu_init was left at "divide by four". This broke the "pll-audio" clock, now only providing quater the expected clock rate. It would in general be desirable to program the postdivider for "pll-audio" to four, such that a broader range of frequencies were available on the pll outputs. But the clock for the integrated codec "ac-dig" does not feature a mux that allows to select from all pll outputs as it is just a simple clock gate connected to "pll-audio". Thus we need to set the postdivider to one to be able to provide the 22.5792MHz and 24.576MHz rates required by the internal sun4i codec. This patches fixes the incorrect clock rate by forcing the postdivider to one in sun8i_v3_v3s_ccu_init. Fixes: 46060be6d8 ("clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll") Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210513131315.2059451-1-t.schramm@manjaro.org		2021-05-24 13:57:37 +02:00
..
actions	clk: actions: Add Actions S500 SoC Reset Management Unit support	2020-07-21 01:50:47 -07:00
analogbits
at91	clk: at91: Trivial typo fixes in the file sama7g5.c	2021-03-13 13:02:02 -08:00
axis
axs10x	clk: axs10x: use devm_platform_ioremap_resource() to simplify code	2019-10-16 16:17:50 -07:00
baikal-t1	clk: baikal-t1: Mark Ethernet PLL as critical	2020-10-13 19:48:34 -07:00
bcm	clk: bcm: rpi: Release firmware handle on unbind	2021-03-22 17:59:51 +01:00
berlin
davinci	This pull request contains zero diff to the core framework. It is a collection	2020-10-22 12:53:28 -07:00
h8300
hisilicon	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	2019-11-27 08:14:17 -08:00
imgtec	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
imx	clk: imx: Reference preceded by free	2021-04-04 22:39:05 +03:00
ingenic	clk: ingenic: Fix divider calculation with div tables	2020-12-19 16:04:58 -08:00
keystone	treewide: Change list_sort to use const pointers	2021-04-08 16:04:22 -07:00
loongson1
mediatek	clk: mediatek: mux: Update parent at enable time	2021-02-09 00:01:28 -08:00
meson	clk: meson: axg: Remove MIPI enable clock gate	2021-02-09 13:32:59 +01:00
microchip	clk: let init callback return an error code	2019-12-23 18:53:13 -08:00
mmp	clk: mmp2: fix build without CONFIG_PM	2021-01-12 12:10:55 -08:00
mstar	clk: mstar: msc313-mpll: Fix format specifier	2021-02-16 12:52:28 -08:00
mvebu	clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0	2021-04-09 15:17:33 +05:30
mxs
nxp
pistachio
pxa	clk: pxa: Constify static struct clk_ops	2020-10-13 19:49:11 -07:00
qcom	clk: qcom: rpmh: add support for SDX55 rpmh IPA clock	2021-04-12 17:55:22 -07:00
ralink	clk: ralink: add clock driver for mt7621 SoC	2021-04-12 19:10:54 -07:00
renesas	clk: renesas: Zero init clk_init_data	2021-03-30 09:58:27 +02:00
rockchip	clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller	2021-03-21 11:13:30 +01:00
samsung	clk: samsung: Remove redundant dev_err calls	2021-04-08 19:35:26 +02:00
sifive	clk: sifive: Use reset-simple in prci driver for PCIe driver	2021-05-04 12:26:09 +01:00
socfpga	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
spear	clk: spear: Move prototype to accessible header	2021-02-11 11:56:06 -08:00
sprd	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
st	clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled one	2021-02-11 11:56:06 -08:00
sunxi	clk: sunxi: Demote non-conformant kernel-doc headers	2021-03-08 16:47:55 +01:00
sunxi-ng	clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audio	2021-05-24 13:57:37 +02:00
tegra	clk: tegra: Don't enable PLLE HW sequencer at init	2021-03-24 14:02:14 +01:00
ti	clk: ti: omap5: Add missing gpmc and ocmc clkctrl	2021-03-10 13:59:18 +02:00
uniphier	clk: uniphier: Fix potential infinite loop	2021-04-12 19:09:59 -07:00
ux500	clk: ux500: Fix up the SGA clock for some variants	2020-01-04 23:27:15 -08:00
versatile	clk: versatile: clk-icst: Fix worthy struct documentation block	2021-02-11 11:56:07 -08:00
x86	More ACPI updates for 5.9-rc1	2020-08-15 08:18:22 -07:00
xilinx	clk: xilinx: move xlnx_vcu clock driver from soc	2021-02-08 18:31:25 -08:00
zynq	clk: zynq: clkc: Remove various instances of an unused variable 'clk'	2021-02-11 11:56:07 -08:00
zynqmp	clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable	2021-04-07 18:09:35 -07:00
clk-asm9260.c	clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo	2020-04-13 12:20:06 -07:00
clk-aspeed.c	clk: aspeed: Add RMII RCLK gates for both AST2500 MACs	2019-11-26 10:02:48 -08:00
clk-aspeed.h	clk: aspeed: Move structures to header	2019-09-06 15:17:02 -07:00
clk-ast2600.c	media: aspeed: fix clock handling logic	2021-03-11 11:59:45 +01:00
clk-axi-clkgen.c	clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand	2021-02-08 18:13:13 -08:00
clk-axm5516.c
clk-bd718x7.c	clk: bd718x7: Add support for clk gate on ROHM BD71815 PMIC	2021-04-14 10:21:26 +01:00
clk-bm1880.c	clk: bm1800: Remove set but not used variable 'fref'	2019-12-24 00:10:33 -08:00
clk-bulk.c	clk: Make clk_bulk_get_all() return a valid "id"	2019-09-17 13:26:31 -07:00
clk-cdce706.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-cdce925.c	clk: clk-cdce925: Add regulator support	2019-09-06 10:31:16 -07:00
clk-clps711x.c
clk-composite.c	clk: composite: add devm_clk_hw_register_composite_pdata()	2020-12-07 14:06:16 -08:00
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c	clk: divider: fix initialization with parent_hw	2021-02-08 18:31:24 -08:00
clk-fixed-factor.c	clk: fixed: fix double free in resource managed fixed-factor clock	2021-04-07 16:01:25 -07:00
clk-fixed-mmio.c	clk: clk-fixed-mmio: Demote obvious kernel-doc abuse	2021-02-11 11:56:05 -08:00
clk-fixed-rate.c	clk: fixed: add missing kerneldoc	2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk-fsl-flexspi.c	clk: fsl-flexspi: new driver	2020-12-07 16:56:41 -08:00
clk-fsl-sai.c	clk: fsl-sai: use devm_clk_hw_register_composite_pdata()	2020-12-07 14:06:16 -08:00
clk-gate.c	treewide: Remove uninitialized_var() usage	2020-07-16 12:35:15 -07:00
clk-gemini.c
clk-gpio.c	Replace HTTP links with HTTPS ones: Common CLK framework	2020-07-10 17:15:34 -07:00
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c	CLK: HSDK: CGU: add support for 148.5MHz clock	2020-05-28 21:06:39 -07:00
clk-k210.c	clk: Add RISC-V Canaan Kendryte K210 clock driver	2021-02-22 17:51:04 -08:00
clk-lochnagar.c	clk: lochnagar: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
clk-max9485.c
clk-max77686.c
clk-milbeaut.c	clk: milbeaut: Don't reference clk_init_data after registration	2019-08-16 10:20:15 -07:00
clk-moxart.c
clk-multiplier.c
clk-mux.c	clk: mux: provide devm_clk_hw_register_mux()	2021-04-07 11:05:44 -07:00
clk-nomadik.c
clk-npcm7xx.c	clk: clk-npcm7xx: Remove unused static const tables 'npcm7xx_gates' and 'npcm7xx_divs_fx'	2021-02-11 11:56:05 -08:00
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-plldig.c	clk: ls1028a: fix a dereference of pointer 'parent' before a null check	2020-02-03 23:03:49 -08:00
clk-pwm.c	clk: pwm: drop of_match_ptr from of_device_id table	2020-12-10 12:24:18 -08:00
clk-qoriq.c	clk: qoriq: use macros to generate pll_mask	2021-02-14 13:02:01 -08:00
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: Fix a resource leak in error handling paths in the probe function	2020-12-19 15:53:31 -08:00
clk-scmi.c	clk: scmi: Port driver to the new scmi_clk_proto_ops interface	2021-03-30 16:34:37 +01:00
clk-scpi.c	clk: scpi: mark scpi_clk_match as maybe unused	2020-12-10 12:24:40 -08:00
clk-si514.c
clk-si544.c
clk-si570.c	clk: si570: Skip NVM to RAM recall operation if an optional property is set	2021-02-11 12:13:50 -08:00
clk-si5341.c	clk: si5341: drop unused 'err' variable	2020-09-22 12:44:41 -07:00
clk-si5351.c	clk: si5351: Wait for bit clear after PLL reset	2020-12-19 15:49:54 -08:00
clk-si5351.h
clk-sparx5.c	clk: sparx5: Add Sparx5 SoC DPLL clock driver	2020-07-28 18:17:56 -07:00
clk-stm32f4.c
clk-stm32h7.c
clk-stm32mp1.c
clk-twl6040.c
clk-versaclock5.c	clk: vc5: Add support for optional load capacitance	2021-02-11 12:09:34 -08:00
clk-vt8500.c
clk-wm831x.c
clk-xgene.c	clk: clk-xgene: Add description for 'mask' and fix formatting for 'flags'	2021-02-11 11:56:06 -08:00
clk.c	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
clk.h
clkdev.c
Kconfig	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00
Makefile	Here's a collection of largely clk driver updates for the merge window. The	2021-04-28 17:13:56 -07:00