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linux-next/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml
Linus Torvalds 9433a51ec1 pwm: Changes for v5.8-rc1
Nothing too exciting for this cycle. A couple of fixes across the board,
 and Lee volunteered to help with patch review.
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Merge tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "Nothing too exciting for this cycle. A couple of fixes across the
  board, and Lee volunteered to help with patch review"

* tag 'pwm/for-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: Add missing "CONFIG_" prefix
  MAINTAINERS: Add Lee Jones as reviewer for the PWM subsystem
  pwm: imx27: Fix rounding behavior
  pwm: rockchip: Simplify rockchip_pwm_get_state()
  pwm: img: Call pm_runtime_put() in pm_runtime_get_sync() failed case
  pwm: tegra: Support dynamic clock frequency configuration
  pwm: jz4740: Add support for the JZ4725B
  pwm: jz4740: Make PWM start with the active part
  pwm: jz4740: Enhance precision in calculation of duty cycle
  pwm: jz4740: Drop dependency on MACH_INGENIC
  pwm: lpss: Fix get_state runtime-pm reference handling
  pwm: sun4i: Support direct clock output on Allwinner A64
  pwm: Add support for Azoteq IQS620A PWM generator
  dt-bindings: pwm: rcar: add r8a77961 support
  pwm: Add missing '\n' in log messages
2020-06-12 12:24:42 -07:00

80 lines
2.1 KiB
YAML

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car PWM Timer Controller
maintainers:
- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
properties:
compatible:
items:
- enum:
- renesas,pwm-r8a7743 # RZ/G1M
- renesas,pwm-r8a7744 # RZ/G1N
- renesas,pwm-r8a7745 # RZ/G1E
- renesas,pwm-r8a77470 # RZ/G1C
- renesas,pwm-r8a774a1 # RZ/G2M
- renesas,pwm-r8a774b1 # RZ/G2N
- renesas,pwm-r8a774c0 # RZ/G2E
- renesas,pwm-r8a7778 # R-Car M1A
- renesas,pwm-r8a7779 # R-Car H1
- renesas,pwm-r8a7790 # R-Car H2
- renesas,pwm-r8a7791 # R-Car M2-W
- renesas,pwm-r8a7794 # R-Car E2
- renesas,pwm-r8a7795 # R-Car H3
- renesas,pwm-r8a7796 # R-Car M3-W
- renesas,pwm-r8a77961 # R-Car M3-W+
- renesas,pwm-r8a77965 # R-Car M3-N
- renesas,pwm-r8a77970 # R-Car V3M
- renesas,pwm-r8a77980 # R-Car V3H
- renesas,pwm-r8a77990 # R-Car E3
- renesas,pwm-r8a77995 # R-Car D3
- const: renesas,pwm-rcar
reg:
# base address and length of the registers block for the PWM.
maxItems: 1
'#pwm-cells':
# should be 2. See pwm.yaml in this directory for a description of
# the cells format.
const: 2
clocks:
# clock phandle and specifier pair.
maxItems: 1
power-domains:
maxItems: 1
resets:
maxItems: 1
required:
- compatible
- reg
- '#pwm-cells'
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/r8a7743-cpg-mssr.h>
#include <dt-bindings/power/r8a7743-sysc.h>
pwm0: pwm@e6e30000 {
compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
reg = <0xe6e30000 0x8>;
clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 523>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
};