Robin Murphy 465931e708 clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328" ... This reverts commit 82f4b67f01. According to a subsequent revert in the vendor kernel, the original change was based on unclear documentation and was in fact incorrect. Emprically, my board's HS200 eMMC at 200MHZ apparently gets lucky with a phase where this had no impact, but limiting max-frequency to 150MHz to match the nominal capability of the I/O pins made it virtually unusable, constantly throwing errors and retuning. With this revert, it starts behaving perfectly at 150MHz too. Fixes: 82f4b67f01 ("clk: rockchip: fix wrong mmc sample phase shift for rk3328") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/c80eb52e34c03f817586b6b7912fbd4e31be9079.1589475794.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2020-07-08 16:22:10 +02:00
..
clk-cpu.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-ddr.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-half-divider.c	clk: rockchip: make clk_half_divider_ops static	2019-10-31 12:06:01 +01:00
clk-inverter.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-mmc-phase.c	clk: rockchip: fix mmc get phase	2020-03-06 12:06:01 -08:00
clk-muxgrf.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282	2019-06-05 17:36:37 +02:00
clk-pll.c	clk: rockchip: convert rk3036 pll type to use internal lock status	2020-06-15 11:47:16 +02:00
clk-px30.c	clk: rockchip: protect the pclk_usb_grf as critical on px30	2019-11-05 20:53:42 +01:00
clk-rk3036.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-rk3128.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-rk3188.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-rk3228.c	clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks	2020-04-13 09:35:24 +02:00
clk-rk3288.c	clk: rockchip: use separate compatibles for rk3288w-cru	2020-07-05 12:18:29 +02:00
clk-rk3308.c	clk: rockchip: Add clock controller for the rk3308	2019-09-05 12:43:39 +02:00
clk-rk3328.c	clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"	2020-07-08 16:22:10 +02:00
clk-rk3368.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-rk3399.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-rv1108.c	clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver	2019-07-25 21:00:52 +02:00
clk.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk.h	clk: rockchip: Add clock controller for the rk3308	2019-09-05 12:43:39 +02:00
Makefile	clk: rockchip: Add clock controller for the rk3308	2019-09-05 12:43:39 +02:00
softrst.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00