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1650dfd1a9
Currently, amd_iommu_pc_get_set_reg_val() cannot support multiple IOMMUs. Modify it to allow callers to specify an IOMMU. This is in preparation for supporting multiple IOMMUs. Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Jörg Rödel <joro@8bytes.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: iommu@lists.linux-foundation.org Link: http://lkml.kernel.org/r/1487926102-13073-8-git-send-email-Suravee.Suthikulpanit@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
91 lines
3.1 KiB
C
91 lines
3.1 KiB
C
/*
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* Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <jroedel@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_X86_AMD_IOMMU_PROTO_H
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#define _ASM_X86_AMD_IOMMU_PROTO_H
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#include "amd_iommu_types.h"
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extern int amd_iommu_get_num_iommus(void);
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extern int amd_iommu_init_dma_ops(void);
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extern int amd_iommu_init_passthrough(void);
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extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
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extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
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extern void amd_iommu_apply_erratum_63(u16 devid);
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extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
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extern int amd_iommu_init_devices(void);
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extern void amd_iommu_uninit_devices(void);
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extern void amd_iommu_init_notifier(void);
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extern int amd_iommu_init_api(void);
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/* Needed for interrupt remapping */
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extern int amd_iommu_prepare(void);
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extern int amd_iommu_enable(void);
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extern void amd_iommu_disable(void);
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extern int amd_iommu_reenable(int);
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extern int amd_iommu_enable_faulting(void);
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extern int amd_iommu_guest_ir;
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/* IOMMUv2 specific functions */
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struct iommu_domain;
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extern bool amd_iommu_v2_supported(void);
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extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
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extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
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extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
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extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
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extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
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u64 address);
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extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
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extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
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unsigned long cr3);
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extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
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extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
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#ifdef CONFIG_IRQ_REMAP
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extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
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#else
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static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
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{
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return 0;
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}
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#endif
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#define PPR_SUCCESS 0x0
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#define PPR_INVALID 0x1
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#define PPR_FAILURE 0xf
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extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
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int status, int tag);
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static inline bool is_rd890_iommu(struct pci_dev *pdev)
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{
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return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
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(pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
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}
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static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
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{
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if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
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return false;
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return !!(iommu->features & f);
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}
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#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */
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