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bd6a9ddcb9
Extend the list of power gates found on Tegra114. Note that there are now holes in the list, so perhaps a simple array is no longer the best data structure to represent it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* Copyright (c) 2010 Google, Inc
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*
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* Author:
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* Colin Cross <ccross@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef _MACH_TEGRA_POWERGATE_H_
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#define _MACH_TEGRA_POWERGATE_H_
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struct clk;
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#define TEGRA_POWERGATE_CPU 0
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#define TEGRA_POWERGATE_3D 1
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#define TEGRA_POWERGATE_VENC 2
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#define TEGRA_POWERGATE_PCIE 3
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#define TEGRA_POWERGATE_VDEC 4
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#define TEGRA_POWERGATE_L2 5
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#define TEGRA_POWERGATE_MPE 6
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#define TEGRA_POWERGATE_HEG 7
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#define TEGRA_POWERGATE_SATA 8
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#define TEGRA_POWERGATE_CPU1 9
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#define TEGRA_POWERGATE_CPU2 10
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#define TEGRA_POWERGATE_CPU3 11
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#define TEGRA_POWERGATE_CELP 12
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#define TEGRA_POWERGATE_3D1 13
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#define TEGRA_POWERGATE_CPU0 14
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#define TEGRA_POWERGATE_C0NC 15
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#define TEGRA_POWERGATE_C1NC 16
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#define TEGRA_POWERGATE_DIS 18
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#define TEGRA_POWERGATE_DISB 19
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#define TEGRA_POWERGATE_XUSBA 20
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#define TEGRA_POWERGATE_XUSBB 21
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#define TEGRA_POWERGATE_XUSBC 22
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#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D
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int tegra_powergate_is_powered(int id);
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int tegra_powergate_power_on(int id);
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int tegra_powergate_power_off(int id);
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int tegra_powergate_remove_clamping(int id);
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/* Must be called with clk disabled, and returns with clk enabled */
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int tegra_powergate_sequence_power_up(int id, struct clk *clk);
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#endif /* _MACH_TEGRA_POWERGATE_H_ */
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