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2d11251168
All these separate directories for each ColdFire CPU SoC varient seems like overkill. The majority of them only contain a single small config file. Move these into the common ColdFire code directory. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
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* intc2.c -- support for the 2nd INTC controller of the 5249
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*
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* (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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static void intc2_irq_gpio_mask(struct irq_data *d)
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{
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u32 imr;
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imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
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imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
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writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
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}
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static void intc2_irq_gpio_unmask(struct irq_data *d)
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{
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u32 imr;
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imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
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imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
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writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
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}
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static void intc2_irq_gpio_ack(struct irq_data *d)
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{
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writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
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}
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static struct irq_chip intc2_irq_gpio_chip = {
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.name = "CF-INTC2",
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.irq_mask = intc2_irq_gpio_mask,
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.irq_unmask = intc2_irq_gpio_unmask,
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.irq_ack = intc2_irq_gpio_ack,
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};
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static int __init mcf_intc2_init(void)
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{
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int irq;
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/* GPIO interrupt sources */
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for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
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irq_set_chip(irq, &intc2_irq_gpio_chip);
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irq_set_handler(irq, handle_edge_irq);
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}
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return 0;
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}
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arch_initcall(mcf_intc2_init);
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