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get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
37 lines
969 B
ArmAsm
37 lines
969 B
ArmAsm
/*
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* include/asm-arm/arch-iop32x/entry-macro.S
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*
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* Low-level IRQ helper macros for IOP32x-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/arch/iop32x.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mrc p15, 0, \tmp, c15, c1, 0
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orr \tmp, \tmp, #(1 << 6)
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mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
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mrc p15, 0, \tmp, c15, c1, 0
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mov \tmp, \tmp
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sub pc, pc, #4 @ cp_wait
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
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cmp \irqstat, #0
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clzne \irqnr, \irqstat
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rsbne \irqnr, \irqnr, #31
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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mrc p15, 0, \tmp1, c15, c1, 0
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ands \tmp2, \tmp1, #(1 << 6)
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bicne \tmp1, \tmp1, #(1 << 6)
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mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
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.endm
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