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5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
149 lines
3.3 KiB
C
149 lines
3.3 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* ASID handling taken from SH implementation.
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2003 Paul Mundt
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_MMU_CONTEXT_H
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#define __ASM_AVR32_MMU_CONTEXT_H
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#include <asm/tlbflush.h>
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#include <asm/pgalloc.h>
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#include <asm/sysreg.h>
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/*
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* The MMU "context" consists of two things:
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* (a) TLB cache version
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* (b) ASID (Address Space IDentifier)
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*/
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#define MMU_CONTEXT_ASID_MASK 0x000000ff
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#define MMU_CONTEXT_VERSION_MASK 0xffffff00
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#define MMU_CONTEXT_FIRST_VERSION 0x00000100
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#define NO_CONTEXT 0
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#define MMU_NO_ASID 0x100
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/* Virtual Page Number mask */
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#define MMU_VPN_MASK 0xfffff000
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/* Cache of MMU context last used */
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extern unsigned long mmu_context_cache;
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/*
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* Get MMU context if needed
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*/
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static inline void
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get_mmu_context(struct mm_struct *mm)
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{
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unsigned long mc = mmu_context_cache;
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if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
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/* It's up to date, do nothing */
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return;
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/* It's old, we need to get new context with new version */
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mc = ++mmu_context_cache;
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if (!(mc & MMU_CONTEXT_ASID_MASK)) {
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/*
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* We have exhausted all ASIDs of this version.
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* Flush the TLB and start new cycle.
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*/
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flush_tlb_all();
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/*
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* Fix version. Note that we avoid version #0
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* to distinguish NO_CONTEXT.
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*/
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if (!mc)
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mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
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}
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mm->context = mc;
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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mm->context = NO_CONTEXT;
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return 0;
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}
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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/* Do nothing */
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}
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static inline void set_asid(unsigned long asid)
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{
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/* XXX: We're destroying TLBEHI[8:31] */
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sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK);
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cpu_sync_pipeline();
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}
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static inline unsigned long get_asid(void)
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{
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unsigned long asid;
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asid = sysreg_read(TLBEHI);
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return asid & MMU_CONTEXT_ASID_MASK;
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}
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static inline void activate_context(struct mm_struct *mm)
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{
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get_mmu_context(mm);
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set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
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}
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static inline void switch_mm(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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if (likely(prev != next)) {
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unsigned long __pgdir = (unsigned long)next->pgd;
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sysreg_write(PTBR, __pgdir);
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activate_context(next);
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}
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}
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#define deactivate_mm(tsk,mm) do { } while(0)
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#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
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static inline void
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enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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static inline void enable_mmu(void)
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{
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sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S)
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| SYSREG_BIT(E)
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| SYSREG_BIT(MMUCR_I)));
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nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop();
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if (mmu_context_cache == NO_CONTEXT)
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mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
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set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
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}
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static inline void disable_mmu(void)
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{
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sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S));
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}
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#endif /* __ASM_AVR32_MMU_CONTEXT_H */
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